• Title/Summary/Keyword: Inverter-Fed

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The Analysis on the Switching Surge of High-voltage Induction Motor fed by Inverter Using EMTP (EMTP를 이용한 인버터 구동 고압 유도전동기의 스위칭 써지 특성 분석)

  • Song, Seung-Yeop;Kim, Jae-Chul;Shin, Joong-Eun;Kwon, Young-Mok;Hwang, Don-Ha
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.58-62
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    • 2004
  • The PWM inverter drive my cause motor terminals voltage surge and oscillation(ringing), which impose severe electric stresses on inter-turn insulation of motor windings. This paper describes the technique used to simulate the problems associated with the use of PWM ASD's(Adjustable Speed Drive) to drive induction motor. The characteristic of switching surge was analyzed by EMTP(Electromagnetic transient program) model. The effects of switching surge by surge impedance, rise-time and cable lengths are also discussed.

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Analysis and Compensation of Current Sampling Error in Discontinuous PWM Inverter for AC Drive (교류 전동기 구동용 불연속 PWM 인버터의 전류 샘플링 오차 해석 및 보상)

  • Song, Seung-Ho;Son, Yo-Chan;Seol, Seung-Gi
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.9
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    • pp.517-522
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    • 1999
  • This paper addresses the issue of current sampling in a high performance AC drive system fed by a discontinuous PWM inverter. The effect of the sampling error due to the measurement delay produced by an input stage low pass filter and an A/D converter is described in the case of discontinuous PWM. To compensate for the sampling error, a method to estimate the delay time of the whole measurement system based on the measured current is proposed and its effectiveness is verified by experimental results. The proposed algorithm can automatically estimate the system delay introduced by the low pass filter and the A/D converter at the commissioning stage. By delaying the current sampling by the estimated value, experimental results indicate that more than 50% reduction of current ripple can be achieved.

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A Study on Reduction of Current Ripple due to Commutation in Brushless DC motor (브러시리스 직류전동기의 전환에 의한 전류 맥동 저감에 관한 연구)

  • Lee, Gwang-Un;Park, Jeong-Bae;Yeo, Hyeong-Gi;Yu, Ji-Yun
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.9
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    • pp.490-497
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    • 1999
  • This paper presents a novel current control method to reduce the current ripple due to commutation in brushless DC motor fed with unipolar PWM voltage source inverter. The proposed current control method can reduce the current ripple due to commutation in high speed range where the DC link voltage of the inverter is less than four times of the phase back-emf. The effectiveness of the proposed current control method is verified with digital simulations and experiments on the 250W brushless DC motor drive systems.

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A Study on the Simulation method for the common-mode voltage and current in the voltage fed PWM inverter system (PWM 인버터로 구동된 유도전동기의 누설전류 억제에 관한 연구(I))

  • 전진휘;이재호;이상훈;김철우
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.3
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    • pp.246-253
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    • 2000
  • 전동기의 제어기법과 제어기 등의 발달로 유도전동기는 산업용으로 널리 보급되고 있으며, 유도전동기를 고효율로 제어하기 위하여 PWM 인버터가 널리 사용되고 있다. 그리고 IGBT와 같은 고속 스위칭 소자의 발달로 인해 전압형 PWM 인버터의 스위칭 주파수가 증가가 가능하게 됐으며, 그로 인해 매우 우수한 동작 특성을 가지게 되었다. 그러나 고속 스위칭은 전압과 전류의 급격한 변화로 인해 매 스위칭마다 발생하는 고주파 성분의 커먼 모드전압과 전류를 발생하게 되고 이들은 베어링 전류와 축전압, 전도 및 방사 EMI, 기기의 절연수명 단축, 등의 악영향을 유발한다. 본 연구에서는 이러한 커먼 모드 전압과 전류에 대한 시스템 레벨 해석이 가능한 시뮬레이션 기법에 대해 실제 측정과 시뮬레이션을 통해 검정하였다. 이를 통해서 커먼 모드 전압과 전류가 PWM 인버터 시스템의 각 부에 미치는 영향을 쉽게 확인 할 수 있으며, 커먼 모드 전압과 전류의 저감을 위해 추가될 수 있는 부가적인 보조회로의 영향에 대해서도 제시된 시뮬레이션 기법을 통해 확인 할 수 있다.

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Equivalent Circuit and Characteristics Analysis of LIM Considering the Time Harmonics (시간고조파를 고려한 선형유도전동기의 등가회로와 특성해석)

  • Jang, S.M.;Lee, H.G.;Park, Y.T.
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.305-307
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    • 1996
  • Because most LIM is driven by inverter, input voltage is involved with the time harmonics. Therefore the equiLlQ/ent circuit for an inverter-fed LIM has to be modified to represent every harmonics present in supply voltage. This paper analyzes the characteristics and loss of LIM to construct the equivalent circuit for each time harmonics through the static test and theoretical analysis. To make an analysis of nonsinusoidal supply waveforms, it is developed the simulation program to calculate the RMS, peak value and THD for any waveforms expressing Fourier series.

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A Parallel Resonant inverter linked type DC-DC Converter with active-c1amp circuits (능동클램프회로를 갖는 병렬공전 인버터 링크형 DC-DC 컨버터)

  • 오경섭;남승식;김동희;김희대;선우영호
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2003.11a
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    • pp.311-314
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    • 2003
  • In this paper, proposed circuit proposes that Active-Clamp-Circuits basis of a current-fed inverter linked type high frequency resonant dc-dc converter of conventional. and the paper the most of characteristics of the reduced high voltage stress main switches with active clamp circuits and output current constant with the resonant part consists of L, C resonant tank circuit. Also, the capacitor (C$_1$, C$_2$) connected in switches are a common using by resonance capacitor and ZVS capacitor. and circuit analysis used state equation of each part modes. Also we conform a rightfulness theoretical analysis by comparing a parameters values and simulation values obtained from simulation using Power MOS-FET as switching devices.

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Fault Diagnosis of a Voltage-Fed PWM Inverter for a Three-parallel Power Conversion System in a Wind Turbine

  • Ko, Young-Jong;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • v.10 no.6
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    • pp.686-693
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    • 2010
  • In this paper, a fault diagnosis method based on fuzzy logic for the three-parallel power converter in a wind turbine system is presented. The method can not only detect both open and short faults but can also identify faulty switching devices without additional voltage sensors or an analysis modeling of the system. The location of a faulty switch can be indicated by six-patterns of a stator current vector and the fault switching device detection is achieved by analyzing the current vector. A fault tolerant algorithm is also presented to maintain proper performance under faulty conditions. The reliability of the proposed fault detection technique has been proven by simulations and experiments with a 10kW simulator.

Improved Power Quality IHQRR-BIFRED Converter Fed BLDC Motor Drive

  • Singh, Bhim;Bist, Vashist
    • Journal of Power Electronics
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    • v.13 no.2
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    • pp.256-263
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    • 2013
  • This paper presents an IHQRR (Integrated High Quality Rectifier Regulator) BIFRED (Boost Integrated Flyback Rectifier Energy Storage DC-DC) converter fed BLDC (Brushless DC) motor drive. A reduced sensor topology is derived by utilizing a BIFRED converter to operate in a dual DCM (Discontinuous Conduction Mode) thus utilizing a voltage follower approach for the PFC (Power Factor Correction) and voltage control. A new approach for speed control is proposed using a single voltage sensor. The speed of the BLDC motor drive is controlled by varying the DC link voltage of the front end converter. Moreover, fundamental frequency switching of the VSI's (Voltage Source Inverter) switches is used for the electronic commutation of the BLDC motor which reduces the switching losses in the VSI. The proposed drive is designed for a wide range of speed control with an improved power quality at the AC mains which falls within the recommended limits imposed by international power quality standards such as IEC 61000-3-2.

ANALYSIS of A VSI-FED INDUCTION MOTOR VECTOR CONTROL with MODEL TRACKING CONTROLLER (전압형 인버터 구동 유도전동기 벡터제어계의 모델추종제어의 해석)

  • Kim, Keun-Ha;Kim, Yong-Ju;Choe, Gyu-Ha;Kim, Han-Sung;Shin, Dae-Cheol;Yu, Gwon-Jong
    • Proceedings of the KIEE Conference
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    • 1990.11a
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    • pp.347-351
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    • 1990
  • In this paper voltage source inverter(VSI)-fed induction motor vector control system is controlled by a derived model tracking controller. The system analysis is discussed from the viewpoints of ideal vector control, adoption of model tracking controller and derivation of linear model. Furthermore, the result is obtained by the model-tracking control compare with that of P-I, I-P control.

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A Design of PFC Circuit for Reducing the Harmonic in Constant Voltage-fed Electronic Ballast Circuit (정전압형 전자식 안정기 회로의 고조파 저감을 위한 PFC회로의 설계)

  • 이현우;이현무;고강훈;고희석
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.4
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    • pp.41-48
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    • 2004
  • In this paper, a PFC(Power Factor Correction) electronic ballast with constant voltage-fed is proposed. The proposed PFC electronic ballast is combined of a high-efficiency boost converter and a conventional half bridge inverter. It is proved that the ripple of input-current and the input-current's harmonic of the proposed PFC electronic ballast are reduced using the voltage divider and soft-switching technique. It is demonstrated that simulation results for fluorescent lamp correspond with theoretical analysis.