• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.06a
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• pp.743-744
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• 2008

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.107-112
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• 2012

In this contribution, we designed a general purpose input/output (GPIO) suitable for embedded systems, especially for Bluetooth baseband. Proposed architecture is compatible for the APB bus in AMBA bus architecture. General purpose I/O should be used as multi-functional and versatile interrupt sources. We considered the edge-sensitive mode as well as the level-sensitive mode for acquiring the interrupt sources. Also, we provided an option to select the operation polarity for flexible application to the embedded systems. The designed GPIO module was automatically synthesized, placed, and routed. The proposed GPIO was implemented through the Altera FPGA and well operated at 25MHz clock frequency.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.5
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• pp.211-217
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• 2001

In this paper, we have developed the 6 DOF force display system to be based on the single PC. The system is composed of the force display device, the force reflecting rendering algorithm and the high-speed controller. The previous systems had a problem, that must adopt high performance workstation or 2-PC in order to control the graphics speedily and stably. In this paper, it is possible to improve the problem as to develop its exclusive controller and new rendering algorithm. The proposed new rendering algorithm is based on the Proxy algorithm, which can convert information of the position, the velocity, and the haptic information into the force-data. Especially, as to use the proxy algorithm, we can construct dynamical virtual-environment with the elasticity, the viscosity, the mass, and the friction force. As the result of the experiment, we found that our system has much superior characteristics than some other haptic interfaces, because it can control of 30,000 polygon model constructed virtual object with 1[kHz] haptic interrupt cycle and 20[Hz] graphic interrupt cycle in the single PC based system.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.6
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• pp.183-189
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• 2019

Despite its low cost, ARM is widely used in smartphones, digital cameras, home network devices, and wireless technologies because of its low power consumption and reliable performance. The domestic memory semiconductor design technology is in the world's highest level, but that of the processor is far less than that, which results in the technology unbalance between the memory and the processor. When designing a processor, exception and interrupt capabilities are requisite, but this is often omitted in the research stage. However, exception processing and interrupts must be included in order for the processor to function fully. In this paper, we design a 32-bit ARMv4 family of processors with exception handling and interrupts using VHDL and verify with ModelSim. As a result, ARM's exception and interrupts are successfully performed.

• The Journal of Information Technology
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• v.4 no.2
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• pp.25-36
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• 2001

In this paper, we present the development of distributed dual real-time kernel system. This paper proposed that real-time applications should be split into small and simple parts with real-time constraints, Following this concept we have designed to preserve the properties of both hard real-time kernel and general kernel. To satisfy these properties, we designed real-time kernel and general kernel, that have their different properties. In real-time tasks, interrupt processing should be un. In general kernel, non real-time tasks or general tasks are run. We compared the results of this study for performance of the proposal real-time kernel with both RT Linux 0.5a and QNX 4.23A, that is, of interrupt latency scheduling precision and message passing.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.895-898
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• 2009

In this contribution, we designed a general purpose input/output (GPIO) suitable for embedded systems, especially for Bluetooth baseband. Proposed architecture is compatible for the APB bus in AMBA bus architecture. General purpose I/O should be used as multi-functional and versatile interrupt sources. We considered the edge-sensitive mode as well as the level-sensitive mode for acquiring the interrupt sources. Also, we provided an option to select the operation polarity for flexible application to the embedded systems. The designed GPIO module was automatically synthesized, placed, and routed. Implementation was performed through the Altera FPGA and well operated at 25MHz clock frequency.

• Journal of Korea Society of Industrial Information Systems
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• v.27 no.6
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• pp.51-58
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• 2022

Microcontroller (MCU) is designed to properly utilize each module through programming by connecting various modules to Advanced Microcontroller Bus Architecture (AMBA). General-purpose MCUs are designed for consumers to use them appropriately in their research or industry area. However, in a specific area such as networking and AI autonomous vehicles, it is necessary to design MCU suitable for the field directly. However, there is a significant barrier for most consumers to directly design an MCU. In this paper, we provide a development guideline that can easily design an MCU for education or research purpose. First, we introduce AMBA system with open IPs, and we verify that the module operates properly through AMBA and interrupt operation. Finally, the MCU system is designed as an on-chip.

• Journal of Software Assessment and Valuation
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• v.16 no.1
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• pp.89-94
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• 2020

In this paper, we propose a software algorithm that can configure n-key roll-over that detects all keys without limitation on the number of pressed keys in the dynamic scanning detection of a keyboard composed of a matrix. The proposed algorithm uses the timer interrupt of the microcontroller for computer keyboard control, so that a constant and accurate detection interval can be obtained, and an accurate debounce time can be provided. In order to confirm the effectiveness of the proposed algorithm, a microcontroller was connected to a toy keyboard constructed in the form of a clavier and experiments were conducted. As a result of the experiment, it was confirmed that detection of all keys was performed accurately regardless of the number of keys pressed.

• The KIPS Transactions:PartA
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• v.16A no.3
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• pp.189-198
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• 2009

The traditional interrupt-based protocol processing at end hosts has two priority-inversion problems. First, low-priority packets may interrupt and delay high-priority process executionssince interrupts have the highest priority in most operating systems. Second, low-priority packet may delay high priority packets when they arrive almost simultaneously since interrupt processing is performed in a FCFS (first come, first served) order. These problems can be solved by a priority-based protocol processing policy and implementation. However, general priority-based schemes commonly have the problem of starvation and cannot support the each network flow requiring the mutually exclusive QoS since the packets are processed in the FCFS order. Therefore, the priority-based schemes are not appropriate for different QoS-demanding applications. In this paper, we present a bottom-half-based approach that relies on priority- and budget-based processing. The proposed approach allows us to solve both the starvation and priority-inversion problems, and further enables effective QoS isolation between different network connections. This feature also enables bounding the protocol processing time at an end host. We finally show through experiments that the proposed approach achieves QoS isolation and control.

• Journal of the Korea Society of Computer and Information
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• v.12 no.5
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• pp.103-112
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• 2007

In this paper, we implement a hypervisor that runs multiple uC/OS-II real-time kernels on one microprocessor. The hypervisor virtualizes microprocessor and memory that are main resources managed by uC/OS-II kernel. Microprocessor is virtualized by controlling interrupts that uC/OS-II real-time kernel handles and memory is virtualized by partitioning physical memory. The hypervisor consists of three components: interrupt control routines that virtualize timer interrupt and software interrupt, a startup code that initializes the hypervisor and uC/OS-II kernels, and an API that provides communication between two kernels. The original uC/OS-II kernel needs to be modified slightly in source-code level to run on the hypervisor. We performed a real-time test and an independent computation test on Jupiter 32-bit EISC microprocessor and showed that the virtualized kernels run without problem. The result of our research can reduce the hardware cost, the system space and weight, and system power consumption when the hypervisor is applied in embedded applications that require many embedded microprocessors.