• Title/Summary/Keyword: Interrupt

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Design of the Expanded Interrupt Controller using VHDL (VHDL을 이용한 확장 인터럽트 제어기의 설계)

  • 박성수;박승엽
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.3
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    • pp.558-567
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    • 2003
  • Most digital signal processors provide 4 external interrupt input channels. But these are not sufficient for external interrupts of motor controls. Customized programmable interrupt controller, 8259, has 8 interrupt channels. Therefore, in the case of more external interrupt channels are needed, designers must expand by cascading the 8259. And this, 8259 device, have some inconvenience of interfacing the microprocessor in motor controls. In this paper, the expanded interrupt controller with 14 sufficient interrupt input channels for motor controls is designed using VHDL on the purpose of interfacing the microprocessor to the interrupt controller more compatibly and increasing the device utilization of FPGA/CPLD designed another peripherals. The interrupt controller model and each function blocks is proposed and illustrated. Simulation result are presented to estimate the designed interrupt controller.

Priority-Based Network Interrupt Scheduling for Predictable Real-Time Support

  • Lee, Minsub;Kim, Hyosu;Shin, Insik
    • Journal of Computing Science and Engineering
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    • v.9 no.2
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    • pp.108-117
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    • 2015
  • Interrupt handling is generally separated from process scheduling. This can lead to a scheduling anomaly and priority inversion. The processor can interrupt a higher priority process that is currently executing, in order to handle a network packet reception interruption on behalf of its intended lower priority receiver process. We propose a new network interrupt handling scheme that combines interrupt handling with process scheduling and the priority of the process. The proposed scheme employs techniques to identify the intended receiver process of an incoming packet at an earlier phase. We implement a prototype system of the proposed scheme on Linux 2.6, and our experiment results show that the prototype system supports the predictable real-time behavior of higher priority processes even when excessive traffic is sent to lower priority processes.

An Interrupt Coalescence Method for Improving Performance of Asynchronous Serial Communication (비동기 시리얼 통신의 성능 향상을 위한 인터럽트 통합 기법)

  • Park, Geun-Duk;Oh, Sam-Kweon;Kim, Byoung-Kuk
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.3
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    • pp.1380-1386
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    • 2011
  • The request of interrupt accompanies a context switching. If the interrupt is frequently requested, this overhead of context switching can reduce seriously the performance of embedded systems. In order to reduce processing overhead due to frequently requested communication interrupts at Asynchronous Serial Communication, this paper introduces the method of Expanded Asynchronous Serial Communication with the Interrupt Coalescence(IC) that accumulates a fixed number of interrupts and processes them in one time. we implement the existing Asynchronous Serial Communication that requests communication interrupts by one byte at an LN2440SBC embedded board with a uC/OS-II and compare interrupt processing time for the performance evaluation about proposed method. As a result, the communication interrupt processing time of proposed method appears in case of low speed(9,600 bps), the decline of an average 25.18% at transmission, the decline of an average 41.47% at reception. and in case of hight speed(115,200 bps), the decline of an average 16.67% at transmission, the decline of an average 25.61% at reception.

Study on the Time Improvement of Interrupt Program by SFC (SFC언어에서 인터럽트 프로그램 시간개선에 관한 연구)

  • You, Jeong-Bong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.10
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    • pp.5134-5139
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    • 2013
  • Ladder Diagram(LD) or Sequential Function Chart(SFC) is used for the design of complex modern control system with Programmable logic controller(PLC). LD is the most widely utilized among PLC standard language. But recently, SFC is used frequently. SFC is very easy to grasp the sequential flow of control logic but is difficult for describing combinational logic. When the interrupt factor is occurred, the main program is stopped. And after the interrupt program is completed, the main program is restart. Therefore the more complex the interrupt program, the main program is interrupted downtime will be that much longer. In this paper, we propose the method for interrupt implementation without the dwell time of the main program by SFC language and confirm his feasibility through the simulation.

Implementation of Nested Software Interrupt and Passing Way of Parameters based on ARM9 (ARM9기반의 Nested Software Interrupt의 구현 및 Parameter의 전달 방식)

  • Han, Gil-Jong;Lew, Kyeung-Seek;Lee, Jung-Won;Kim, Yong-Deak
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.48 no.5
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    • pp.66-73
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    • 2011
  • I try to solve the problem of the usage of the general software interrupt with the nested call of the software interrupt and the effective passing way of the parameters. The software interrupt should be protected against the indiscriminate access because it is used to call the system functions or to use the system resources by generating a software interrupt. But, it is difficult to effectively handle the SWI instruction because of its limited usage. I designed and implemented nested call of the software interrupt and the effective way that handle the parameters in the software interrupt service routine to solve this problem in this paper. In other words, from the single SWI call to the nested SWI call, I improved the software interrupt use all the more flexibly, and I compared and analyzed the strong and weak points of the two passing ways of the parameters. The main differences between these two ways are speed and readability. The stack pointer getting way incurred a lot of overhead although it has a very great readability. But, the stack pointer passing way producted 19% of the effectivity in speed by reduce overhead.

RESEARCH OF COMMUNICATION SCHEDULING BETWEEN COMPUTER I/O AND S/W FOR ACQUISITION OF SATELLITE SENSORED DATA

  • Koo, Cheol-Hea;Park, Su-Hyun;Kang, Soo-Yeon;Yang, Koon-Ho;Choi, Sung-Bong
    • Proceedings of the KSRS Conference
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    • v.1
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    • pp.196-199
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    • 2006
  • Various communication mechanisms have been developed to acquire a meaningful data from sensors. The key requirement during the sensor data acquisition is determinism and reduction of time dependency. It is a fundermental level of satellite data management for controlling satellite operation software data acquisition from sensors or subsystem. Satellite operation software has various software modules to be operated in addition to data acquisition. Therefore, unnecessary time delay shall be minimized to perform the data acquisition. As the result, interrupt method might be prefered than polling method because the former can decrease the restriction of design during implementation of data acquisition logic. The possible problems while using interrupt method like as interrupt latency caused by delaying of interrupt processing time are analyzed. In this paper, communication mechanism which can be used to interface with satellite computer and subsidary subsystem by using interrupt is presented. As well, time dependency between software scheduling and data acquisition is analyzed.

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An Efficient Record-Replay Mechanism using Hardware Performance Counters and Debugging Facilities (하드웨어 성능 카운터와 디버깅 기능을 이용한 리코드-리플레이 방법)

  • Maeng, Ji-Chan;Ryu, Min-Soo
    • The KIPS Transactions:PartA
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    • v.18A no.5
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    • pp.177-180
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    • 2011
  • In this paper, we present a record-replay technique based on interrupt logging and reproduction. Race conditions have been considered as the main source of nondeterminism in conventional record-replay approaches. However, interrupts are another source of nondeterministic computer system behavior, which must be reproduced at accurate time points, let alone the order of interrupt occurrence. We show that an interrupt-based replayer can be efficiently and effectively implemented by using hardware performance counters and debugging functionality. Experiments also show that the runtime overhead of the interrupt-based replayer is sufficiently low.

An Implementation of Task Switching and Interrupt Handling Mechanisms of OSEK Operating System based on ARM Processor (ARM 프로세서를 기반으로 한 OSEK 운영체제의 태스크 전환 및 인터럽트 핸들링 메커니즘 구현)

  • Rim, Seong-Rak;Kwon, O-Yong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1947-1953
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    • 2011
  • OSEK/VDX is a joint project aiming at an industry standard for ECUs in vehicles and OSEK OS is a real-time operating system that meets OSEK/VDX specifications. In this paper, we suggest an implementation of task switching and interrupt handling mechanisms of OSEK operating system based on ARM processors. Considering the requirements of OSEK OS and characteristics of ARM processor, we have designed task switching and interrupt handling mechanisms. For evaluating the validation of the suggested mechanisms, we have checked the functional correctness on an experimental embedded board with ARM processor and calculated the time of task switching and interrupt handling.

Implementation of Interrupt Service Process for Efficient Interrupt Handling (효율적 인터럽트 처리를 위한 인터럽트 서비스 프로세스의 구현)

  • 양희권;조희남;성영락;이철훈
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.10a
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    • pp.319-321
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    • 2003
  • 인터럽트는 시스템의 내.외부의 프로그램 또는 장치에 의해 발생하는 신호로서 운영체제가 하던 일을 멈추고 인터럽트 서비스 루틴(Interrupt Service Routine)을 통해 적합한 동작을 수행하도록 한다. 실시간 시스템을 포함한 대부분의 컴퓨팅 시스템에서 인터럽트의 발생 빈도와 인터럽트 서비스 루틴의 수행시간에 따라 Response Time이 길어질 수 있는데 이는 시스템에 커다란 오버헤드가 된다. 본 논문에서는 실시간 운영체제에서 Response Time을 줄이고 효율적으로 인터럽트를 서비스하기 위한 인터럽트 서비스 프로세스의 구현에 대해 기술한다.

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Development of Portable Power Interrupt Tester using Microcontroller (휴대형 전원 순단 시험 장치의 개발)

  • Park, C.W.;Rho, J.K.
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.962-964
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    • 2003
  • In this paper, development of portable power interrupt tester to evaluate microprocessor based control circuits for an endurance under abnormal power source. 89C2051 micro-controller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

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