• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.68-73
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• 2014

A linear stacked field-effect transistor (FET) power amplifier (PA) is implemented using a $0.18-{\mu}m$ silicon-on-insulator CMOS process for W-CDMA handset applications. Phase distortion by the nonlinear gate-source capacitance ($C_{gs}$) of the common-source transistor, which is one of the major nonlinear sources for intermodulation distortion, is compensated by employing a PMOS linearizer with improved AM-PM. The linearizer is used at the gate of the driver-stage instead of main-stage transistor, thereby avoiding excessive capacitance loading while compensating the AM-PM distortions of both stages. The fabricated 836.5 MHz linear PA module shows an adjacent channel leakage ratio better than -40 dBc up to the rated linear output power of 27.1 dBm, and power-added efficiency of 45.6% at 27.1 dBm without digital pre-distortion.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1407-1413
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• 2000

This paper presents a feedforward linear power amplifier (LPA) using error feedback technique to achieve low intermodulation distortions(IMD) of power amplifiers for base stations. Especially, the proposed linear power amplifier is applied to feedforward technique combined with error feedback technique, which has no loss of amplifier gain unlike typical feedback technique. The proposed LPA is designed by using HP ADS ver. 1.3, fabricated. When two-tone signals at 1850 MHz and 1851.25 MHz with -7 dBm/tone from synthesizers are injected into the main power amplifier with gain of 28 dB and P1dB of 1W, the proposed LPA could reduce more than 35 dB.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.5
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• pp.999-1003
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• 2009

We have designed and fabricated a linear drive amplifier with a novel intermodulation distortion(IMD) canceller using $0.18{\mu}m$ CMOS process. The drive amplifier with IMD canceller is composed of a cascode main amplifier and an additional common-source IMD canceller. Since the IMD canceller generates IM3($3^{rd}$-order imtermodulation) signal with $180^{\circ}$ phase difference against the IM3 of the cascode main amplifier, the IM3 power is drastically eliminated. As of the measurement results, $OP_{1dB}$, $OIP_3$, and power-add efficiency are 5.5 dBm, 15.5 dBm, and 21%, respectively. Those are 5 dB, 6 dB, and 13.5% enhanced values compared to a conventional cascode drive amplifier. The IMD3 of the drive amplifier with IMD canceller is enhanced more than 10 dB compared to that of the conventional cascode drive amplifier for input power ranges from -22 to -14 dBm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1369-1373
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• 2003

A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET Predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30㏈m class A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1㏈ gain and a P1㏈ of 30 ㏈m(two-tone) was utilized. The reduction of IMD is around 22㏈.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.12A
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• pp.1019-1024
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• 2003

In the thesis, we propose a new type of the predistortion linearizer using frequency multiplier The linearizer utilizing the 2nd and 3th harmonic used the individual control of the 3rd and 5th order intermodulation distortion(IMD) component. This structure is composed of wilkinson power combiner for combine and isolation of output signal, 3rd order IMD product controller using doubler and 5th order IMD product controller using tripler. The proposed predistortion linearizer controlled by individual order is obtained for about -16 dBc and 18 dBc of 3rd order and 5th order IMD components, respectively, over the frequency band 870 MHz to 880 MHz at the output power of 34 dBm/tone.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.5
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• pp.1076-1081
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• 2007

In this paper, we propose a new switch structure for time division duplex(TDD) system. The existing TDD structure utilizes a circulator fur isolation characteristic between ports. However, the circulator produces intermodulation distortion signals which are undesired signal because of its nonlinear properties. The proposed circuit is composed of a modified branch-line hybrid coupler which controls the signal flow while the isolated port is open-/short- terminated. In order to prove the validity of the presented structure, the switch circuit is fabricated and measured at 2.3GHz, the center frequency of Wibro service system.

• Journal of Sensor Science and Technology
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• v.32 no.6
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• pp.432-440
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• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.10 s.113
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• pp.959-966
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• 2006

This paper proposes a new concept about dual band predistortion linear power amplifier(PD LPA) using diplexer for digital cellular ($f_o$=880 MHz) and IMT-2000($f_o$=2,140 MHz) base stations. The diplexer is composed of low pass filter having defected ground structure(BGS) microstrip line and high pass filter having high-Q lumped capacitors and distributed elements. The proposed predistorter adopts a reflection type intermodulation signal generator with 3 dB hybrid coupler for good reflection characteristic. for a forward link one carrier CDMA IS-95A 1FA and WCDMA 1FA signal, the proposed dual band PD LPA shows the adjacent channel leakage ratio(ACLR) improvement about 10 dB and 9.36 dB for digital cellular and IMT-2000 band, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.8 s.99
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• pp.825-834
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• 2005

In this paper, a new signal canceller that input signals are equally group-delayed and cancelled each other is proposed and feedforward linearizing power amplifier that adopt the proposed signal cancellers is fabricated. Although the conventional signal canceller can't matches the phase and the group delay time of input signals simultaneously, the proposed signal canceller matches those simultaneously. Simultaneous matching of the phase and the group delay time can makes wideband signal cancellation. The main signal cancellation loop of the fabricated feedforward amplifier with the proposed signal cancellers cancel input signal more than 26.3 dB and the intermodulation distortion signal cancellation loop cancel more than 15.2 dB for 200 MHz bandwidth. And the proposed feedforward power amplifier improves C/I ratio by 20.8 dB with two tones at 2,115 MHz, 2,165 MHz, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1205-1214
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• 2013

Recently spaceborne SAR systems are increasing image resolution and frequency. As a high quality image resolution, the wider bandwidth is required and a wideband signal generator with RF component is very complicated and RF impairments of device is increased. Therefore, it is very important to improve performance by reducing these errors. In this study, the transmission signal of the wideband signal generator is applied to the phase noise, IQ imbalance, ripple gain, nonlinear model of high power amplifier. And we define possible structures of wideband signal generator and measure the PSLR and ISLR for the performance assesment. Also, we extract error of the amplitude and phase from the waveform and use a quadratic polynomial curve fitting and examine the performance change due to nonlinear device. Finally, we apply a high power amplifier predistortion method for non-linear error compensation. And we confirm that distortion in the output of the amplifier by intermodulation component is decreased by 15 dB.