• Title/Summary/Keyword: Interconnection Networks

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An Analysis and Design of Efficient Community Routing Policy for Global Research Network (글로벌연구망을 위한 효율적인 커뮤니티 라우팅 정책의 분석 및 설계)

  • Jang, Hyun-Hee;Park, Jae-Bok;Koh, Kwang-Shin;Kim, Seung-Hae;Cho, Gi-Hwan
    • Journal of Internet Computing and Services
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    • v.10 no.5
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    • pp.1-12
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    • 2009
  • A routing policy based on BGP community routing permits to select a specific route for particular network by making use of user-defined routing policies. Especially, community based routing policy is recently getting a great concern to enhance overall performance in the global research networks which are generally inter-connected large number of different characterized networks. In this paper, we analyze the community routing which has been applied in existing global research networks in the network performance point of view, and catch hold of problems caused by the routing performance in a new global research network. Then, we suggest an effective community routing policy model along with an interconnection architecture of research networks, in order to make correct some wrong routings and resolve an asymmetric routing problem, for a new global research network. Our work is expected to be utilized as an enabling base technology to improve the network performance of future global research networks as well as commercial networks.

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Fault Diameter and Mutually Disjoint Paths in Multidimensional Torus Networks (다차원 토러스 네트워크의 고장지름과 서로소인 경로들)

  • Kim, Hee-Chul;Im, Do-Bin;Park, Jung-Heum
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.5_6
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    • pp.176-186
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    • 2007
  • An interconnection network can be represented as a graph where a vertex corresponds to a node and an edge corresponds to a link. The diameter of an interconnection network is the maximum length of the shortest paths between all pairs of vertices. The fault diameter of an interconnection network G is the maximum length of the shortest paths between all two fault-free vertices when there are $_k(G)-1$ or less faulty vertices, where $_k(G)$ is the connectivity of G. The fault diameter of an R-regular graph G with diameter of 3 or more and connectivity ${\tau}$ is at least diam(G)+1 where diam(G) is the diameter of G. We show that the fault diameter of a 2-dimensional $m{\times}n$ torus with $m,n{\geq}3$ is max(m,n) if m=3 or n=3; otherwise, the fault diameter is equal to its diameter plus 1. We also show that in $d({\geq}3)$-dimensional $k_1{\times}k_2{\times}{\cdots}{\times}k_d$ torus with each $k_i{\geq}3$, there are 2d mutually disjoint paths joining any two vertices such that the lengths of all these paths are at most diameter+1. The paths joining two vertices u and v are called to be mutually disjoint if the common vertices on these paths are u and v. Using these mutually disjoint paths, we show that the fault diameter of $d({\geq}3)$-dimensional $k_1{\times}k_2{\times}{\cdots}{\times}k_d$ totus with each $k_i{\geq}3$ is equal to its diameter plus 1.

Fault free Shortest Path routing on the de Bruijin network (드브르젼 네트워크에서 고장 노드를 포함하지 않는 최단 경로 라우팅)

  • Ngoc Nguyen Chi;Nhat Vo Dinh Minh;Zhung Yonil;Lee Sungyoung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.11B
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    • pp.946-955
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    • 2004
  • It is shown that the do Bruijn graph (dBG) can be used as an architecture for interconnection network and a suitable structure for parallel computation. Recent works have classified dBG based routing algorithms into shortest path routing and fault tolerant routing but investigation into fault free shortest path (FFSP) on dBG has been non-existent. In addition, as the size of the network increase, more faults are to be expected and therefore shortest path dBG algorithms in fault free mode may not be suitable routing algorithms for real interconnection networks, which contain several failures. Furthermore, long fault free path may lead to high traffic, high delay time and low throughput. In this paper we investigate routing algorithms in the condition of existing failure, based on the Bidirectional do Bruijn graph (BdBG). Two FFSP routing algorithms are proposed. Then, the performances of the two algorithms are analyzed in terms of mean path lengths and discrete set mean sizes. Our study shows that the proposed algorithms can be one of the candidates for routing in real interconnection networks based on dBG.

All-port Broadcasting Algorithms on Wormhole Routed Star Graph Networks (웜홀 라우팅을 지원하는 스타그래프 네트워크에서 전 포트 브로드캐스팅 알고리즘)

  • Kim, Cha-Young;Lee, Sang-Kyu;Lee, Ju-Young
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.2
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    • pp.65-74
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    • 2002
  • Recently star networks are considered as attractive alternatives to the widely used hypercube for interconnection networks in parallel processing systems by many researchers. One of the fundamental communication problems on star graph networks is broadcasing In this paper we consider the broadcasting problems in star graph networks using wormhole routing. In wormhole routed system minimizing link contention is more critical for the system performance than the distance between two communicating nodes. We use Hamiltonian paths in star graph to set up link-disjoint communication paths We present a broadcast algorithm in n-dimensional star graph of N(=n!) nodes such that the total completion time is no larger than $([long_n n!]+1)$ steps where $([long_n n!]+1)$ is the lower bound This result is significant improvement over the previous n-1 step broadcasting algorithm.

The Technology Trend of Interconnection Network for High Performance Computing (고성능 컴퓨팅을 위한 인터커넥션 네트워크 기술 동향)

  • Cho, Hyeyoung;Jun, Tae Joon;Han, Jiyong
    • Journal of the Korea Convergence Society
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    • v.8 no.8
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    • pp.9-15
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    • 2017
  • With the development of semiconductor integration technology, central processing units and storage devices have been miniaturized and performance has been rapidly developed, interconnection network technology is becoming a more important factor in terms of the performance of high performance computing system. In this paper, we analyze the trend of interconnection network technology used in high performance computing. Interconnect technology, which is the most widely used in the Supercomputer Top 500(2017. 06.), is an Infiniband. Recently, Ethernet is the second highest share after InfiniBand due to the emergence of 40/100Gbps Gigabit Ethernet technology. Gigabit Ethernet, where latency performance is lower than InfiniBand, is preferred in cost-effective medium-sized data centers. In addition, top-end HPC systems that demand high performance are devoting themselves from Ethernet and InfiniBand technologies and are attempting to maximize system performance by introducing their own interconnect networks. In the future, high-performance interconnects are expected to utilize silicon-based optical communication technology to exchange data with light.

A Study on the Energy Efficient MAC Layer ARQ Protocol for Wireless Ubiquitous Networks (무선 유비쿼터스 네트워크를 위한 에너지 효율적인 MAC Layer ARQ 프로토콜에 대한 연구)

  • Roh, Jae-Sung;Kim, Wan-Tae
    • Journal of Advanced Navigation Technology
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    • v.15 no.1
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    • pp.54-60
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    • 2011
  • The development of wireless sensor networks (WSN) can be motivated by several types of applications. However, these applications demand an energy-efficient WSN that can prolong the network lifetime and can provide high throughput, low latency and delay. Designing wireless sensor networks with the capability of prolonging network lifetime catch the attention of many researchers in wireless system and network field. Contrasts with Mobile Ad Hoc Network system, Wireless Sensor Networks designs focused more on survivability of each node in the network instead of maximizing data throughput or minimizing end-to-end delay. In this paper, we will study part of data link layer in Open Systems Interconnection (OSI) model, called medium access control (MAC) layer. Since the MAC development of energy aware MAC Protocol for wireless sensor layer controls the physical radio part, it has a large impact on the overall energy consumption and the lifetime of a node. This paper proposes a analytical approach that tries to reduce idle energy consumption, and shows the increasement of network end-to-end arrival rate due to efficiency in energy consumption from time slot management.

QoS-aware Fast Wakeup and Connection Mechanism on Broadcasting Convergence Network (방송통신 융합망에서 QoS 향상을 위한 Fast Wakeup and Connection 기술)

  • Kim, Moon
    • Journal of Advanced Navigation Technology
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    • v.21 no.4
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    • pp.402-412
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    • 2017
  • The convergence of broadcasting and telecommunication technologies is a key issue of the ubiquitous networks. So this paper offers the convergence of integrated telecommunication networks and broadcasting system, Advanced Terrestrial Digital Multimedia Broadcasting (AT-DMB), and the interconnection of them via the Media Independent Information Server/Service (MIIS). Then, this paper proposes the fast wakeup and connection mechanism with concepts for improving QoS and energy efficiency simultaneously. In the proposed convergence network, our mechanism places the key on the minimization of both the incoming service delay destined to a turned-off interface by using the broadcasting network and the additional energy consumption. This paper further evaluates the performance of proposed mechanism through the numerical and experimental analysis and has confirmed the decrease of both service delay and energy consumption.

Moving-Target Tracking System Using Neural Networks (신경회로망을 이용한 이동 표적 추적 시스템)

  • 이진호;윤상로;이승현;허선종;김은수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.11
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    • pp.1201-1209
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    • 1991
  • Generally, the conventional tracking algorithms are very limited in the practical applications because of its exponential increase in the required computation time for the number of targets being tracked. Therefore, in this paper, a new real-time moving target tracking system is proposed, which is based on the neural networks with massive parallel processing capabilities. Through the theoretical and experimental results, the target tracking system based on neural network algorithm is analyzed to be computationally independent of the number of objects being tracked and performs the optimized tracking through its massive parallel computation and learning capabilities. And this system also has massive matched filtering effects because the moving target data can be compactly stored in the interconnection weights by learning. Accordingly, a possibility of the proposed neural network target tracking system can be suggested to the fields of real-time application.

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Fault Identification Matrix in Linear Networks (선형회로에 있어서의 결함식별 매트릭스)

  • 임광호
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.9 no.1
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    • pp.17-24
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    • 1972
  • A method utilizing vector representation is investigated for determining a faulty elenlent in passive and active networks by simple external measurements. A large system may be considered as an interconnection of a number of subnetlvorks. By utilizing the relationships between the magintudes of a transfer function at various frequencies and the deviations of a circuit element, the fault simulation curves can be drawn. The fault identification regions are defined from the fault simulation curves. A fault identlfication matrix is constructed corresponding the defined fault identification regions. The fault identification matrix, when premultiplied by a vector whose components are measured from a network, yieldg another vector whose components identify a network element which is faulty. A test procedure for the fault identification method is presented and verified by experiments.

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Hardware Implementation of Discrete-Time Cellular Neural Networks Using Distributed Arithmetic (분산연산 방식을 이용한 이산시간 Cellular 신경회로망의 하드웨어 구현)

  • Park, Sung-Jun;Lim, Joon-Ho;Chae, Soo-Ik
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.1
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    • pp.153-160
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    • 1996
  • In this paper, we propose an efficient digital architecture for the discrete-time cellular neural networks (DTCNN's). DTCNN's have the locality and the translation invariance in the templates which determine the patterns of the connection between the cells. Using distributed arithmetic (DA) and the characteristics of DTCNN, we propose a simple implementation of DTCNN. The bus width in the cell-to-cell interconnection is reduced to one bit because of DA's bitwise operation. We implemented the reconfigurable architecture of DTCNN using programmable FPGA.

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