• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.196-203
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• 2004

A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.18 no.11
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• pp.1111-1117
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• 2008

During the dynamic analysis of a system, the Coulomb friction law is emploved to calculate the friction force. Since the static friction coefficient is only employed during the zero relative velocity, it is impractical to employ the coefficient during the dynamic analysis. To calculate the static friction force, therefore, some friction models have been developed. In this study, the integration stability and the accuracy of the models are investigated with some numerical examples. The effect of time step size during the numerical integration is also investigated. The numerical study shows that the friction model employed for most commercial codes is not as good as the one proposed in this study.

• Industry Promotion Research
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• v.8 no.3
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• pp.61-67
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• 2023

This study is to suggest ways to overcome the social exclusion experienced by migrants in Korean society and achieve social integration, focusing on the fact that social exclusion continues in many fields along with the increasing number of migrants. The research results are as follows. First, the legal system related to migrants must be enacted and revised. As the number of migrants increases, various legal and institutional enactments as well as reorganization of related laws are inevitable. Immigrants should be allowed to overcome social exclusion so that their cultural uniqueness and value are recognized and preserved, and they are given the same qualifications and abilities as the residents. Second, migrants' political participation must be guaranteed. When the political participation of migrants, which is currently only open to a small part, is guaranteed, Korean society can be seen as progressing one step toward a multicultural society. Third, residents and migrants must coexist. As a premise of this, it is necessary to prepare a ground where social exclusion can be overcome so that migrants can coexist. Immigrants should be able to develop a relationship of coexistence in the reality that social exclusion is progressing in each field compared to permanent residents. In conclusion, in order for the increasing number of immigrants to settle in Korean society, social integration can be achieved only when social exclusion imposed on immigrants is overcome.

• Journal of the Korean Society of Industry Convergence
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• v.8 no.2
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• pp.69-76
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• 2005

This study for Customer Satisfaction(Customer Focus) by Profit security' in the field Process improvement activity and man-power upgrade by DAS(DATA Acquisition System) in the Plant that is fusion Off Line and On Line(IT), Especially the basic of the most foundation in the beginning Step of Toyota system is 3-jeong(a standard instrument; right volume, right box, right position), 5S(Seiri, Seiton, Seisoh, Seiketsu, Sitsuke ; KAISEN, KANBNA System(for Logistic), Further more KPC has established the digital environment such as CIM ; Computer Integrated Manufacturing), IMS ; Intelligent Manufacturing System ERP ; Enterprise Resource Planning, DAS; Data Acquisition System, Autonomous QC & SPC etc,.) in order to realize the intelligent informatization, which is core base for obtaining the competitive power and for responding to the various 21C management environment in flexibility. In this digital management environment, continuously and powerfully they would advance for becoming the best of the world. For strategic changes to take place in industry 3 key important factors need to be included ; Integration of tasks function and process, Decentralization of information, Responsibility, Finally simplification of products and product structures.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.5
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• pp.563-571
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• 2012

In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.