• ETRI Journal
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• 제43권5호
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• pp.909-915
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• 2021

GaAs on Si grown via metalorganic chemical vapor deposition is demonstrated using various Si substrate thicknesses and three types of dislocation filter layers (DFLs). The bowing was used to measure wafer-scale characteristics. The surface morphology and electron channeling contrast imaging (ECCI) were used to analyze the material quality of GaAs films. Only 3-㎛ bowing was observed using the 725-㎛-thick Si substrate. The bowing shows similar levels among the samples with DFLs, indicating that the Si substrate thickness mostly determines the bowing. According to the surface morphology and ECCI results, the compressive strained indium gallium arsenide/GaAs DFLs show an atomically flat surface with a root mean square value of 1.288 nm and minimum threading dislocation density (TDD) value of 2.4×10⁷ cm^-2. For lattice-matched DFLs, the indium gallium phosphide/GaAs DFLs are more effective in reducing the TDD than aluminum gallium arsenide/GaAs DFLs. Finally, we found that the strained DFLs can block propagate TDD effectively. The strained DFLs on the 725-㎛-thick Si substrate can be used for the large-scale integration of GaAs on Si with less bowing and low TDD.

• Transactions on Electrical and Electronic Materials
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• 제11권6호
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• pp.243-248
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• 2010

The emergence of different and disparate materials together with the convergence of both the 'old' and 'emerging' technologies is paving the way for integration of heterogeneous technologies that are likely to extend the limitations of silicon technology beyond the roadmap envisaged for complementary metal-oxide semiconductor. Formulation of new information processing concepts based on novel aspects of nano-scale based materials is the catalyst for new nanoarchitectures driven by a different perspective in realization of novel logic devices. The memory technology has been the pace setter for silicon scaling and thus far has pave the way for new architectures. This paper provides an overview of the inevitability of heterogeneous integration of technologies that are in their infancy through initiatives of material physicists, computational chemists, and bioengineers and explores the options in the spectrum of novel non-volatile memory technologies considered as forerunner of new logic devices.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.68.2-68.2
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• 2012

We present a scheme for monolithically integrating aligned arrays of single walled carbon nanotubes (SWNTs) with sheets of graphene, for use in electronic devices. Here, the graphene and arrays of SWNTs are formed separately, using chemical vapor deposition techniques onto different, optimized growth substrates. Techniques of transfer printing provide a route to integration, yielding two terminal devices and transistors in which patterned structures of graphene form the electrodes and the SWNTs arrays serve as the semiconductor. Electrical testing and analysis reveal the properties of optically transparent transistors that use this design, thereby giving insights into the nature of contacts between graphene and SWNTs.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.763-764
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• 2006

The rapid growth of Hardware technologies and Network fitted to us Ubiquitous Computing Life[1]. Ubiquitous Computing integrates computation into the environment, rather than having computers which are distinct objects. There are many computational things like a Sensor Network, RFID, GPS, Mobile devices, and so on. Ubiquitous Data Integration and Management are new paradigms. The goals of UDI Service Platform are data protection for the distributed data on pervasive computing devices and data distribution to appropriate users with best distribution policies. To implement the idea we evaluate the logical schema Cyber View that is a management tool.

• 한국컴퓨터정보학회논문지
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• 제22권6호
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• pp.79-86
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• 2017

In this paper, we implement a common module that can integrate multiple biometric information for integrated patient monitoring system. Conventional biomedical instruments have many devices attached to each patient, making it difficult to monitor abnormality signs of many patients in real time. In this paper, we propose a module for an integrated monitoring system that can perform centralized monitoring using a common module that integrates multiple measurement devices. A protocol for sending and receiving packets between the measuring device and the common module is designed, and the packets transmitted through the network are stored and managed through the integrated monitoring system and provide information to various users such as medical staff. The results of this study are expected to contribute to the management of patients and efficient medical services in hospitals.

• 정보통신설비학회논문지
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• 제10권1호
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• pp.27-32
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• 2011

These days more electric devices are implemented in car, and more accurate estimation of SoC is required. OCV with current integration and Internal Resistance is essential method of Battery SoC Estimation. In this paper we propose OCV with current integration method and compare with Internal Resistance method. In OCV with current integration method estimation error was less than average 2%, but requires more than 5 minutes to stabilize OCV. If Stop and Running conditions are change frequently, estimation error will increase. In Internal resistance Modeling method, in high SoC state, estimation error was more than 15%, and in low SoC state, estimation error was less than 8%.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 정기총회 및 추계학술대회 논문집
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• pp.2147-2152
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• 2011

This study of bimodal integration management system in conjunction with the tram and the tram cars bimodal integrated management system that occupies a part of the system to perform its role as a bimodal tram vehicle configuration, a device for the vehicle's infrastructure ryureul development and it is aimed to build on the vehicle. Bimodal tram vehicle infrastructure systems, internal and external information of the larger vehicles, and vehicles used to collect information for its own part and the integrated operations management center, or providing partial information from the station and collect/provide for the transfer of information to the communication part consists In this study, the core of these devices, the configuration of the vehicle infrastructure systems for the overall management and control of vehicles operating a computer's central processing device, vehicle infrastructure systems that make it manages and stores all jangchiryu Integrated Operations Management Center is reporting. In addition, seamless integration with operational management center for interactive communication in a vehicle mounted communications devices to maintain the best condition to manage. Current general traffic management system in a similar terminal device being used, but bimodal tram vehicles operating the computer of the vehicle operates the infrastructure to configure the devices around the one to configure the system in terms of step enhanced the active type, the operating terminal unit of inter active type. In this study, considering the future alignment of the accounting fee system, the expansion of the system reliability and stability around the activities that are underway.

• 진공이야기
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• 제3권3호
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• pp.15-18
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• 2016

In future wearable electronic systems, 3-dimensional (3D) devices have attracted much attention due to their high density integration and low-power functionality. Among 3D devices, gate-all-around (GAA) nanowire transistor provides superior gate controllability, resulting in suppressing short channel effect and other drawbacks in 2D metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon nanowires (SiNWs) are the most promising building block for GAA structure device due to their compatibility with the current Si-based ultra large scale integration (ULSI) technology. Moreover, the theoretical limit for subthreshold swing (SS) of MOSFET is 60 mV/dec at room temperature, which causes the increase in Ioff current. To overcome theoretical limit for the SS, it is crucial that research into new types of device concepts should be performed. In our present studies, we have experimentally demonstrated feedback FET (FBFET) and tunnel FET (TFET) with sub-60 mV/dec based on SiNWs. Also, we fabricated SiNW based complementary TFET (c-TFET) and SiNW complementary metal-oxide-semiconductor (CMOS) inverter. Our research demonstrates the promising potential of SiNW electronic devices for future wearable electronic systems.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제6권1호
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• pp.84-97
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• 2012

M2M (Machine-to-Machine) Technology makes it possible to network all kinds of terminal devices and their corresponding enterprise applications. Therefore, several M2M platforms were developed in China in order to collect information from terminal devices dispersed all over the local places through 3G wireless network. However, when enterprise applications try to integrate with M2M platforms, they should be maintained and refactored to adapt the heterogeneous features and properties of M2M platforms. Moreover, syntactical and semantic unification for information sharing among applications and devices are still unsolved because of raw data transmission and the usage of distinguished business vocabularies. In this paper, we propose and develop an M2M Middleware to support agile application integration with M2M platform. This middleware imports the event engine and XML-based syntax to handle the syntactical unification, makes use of Ontology-based semantic mapping to solve the semantic unification and adopts WebService and ETL techniques to sustain multi-pattern interactive approach, in order to agilely make applications integrated with the M2M platform. Now, the M2M Middleware has been applied in the China Telecom M2M platform. The operation results show that applications will cost less time and workload when being integrated with M2M platform.

• 전자통신동향분석
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• 제36권3호
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• pp.12-22
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• 2021

Since the technical realization of self-aligned planar complementary metal-oxide-semiconductor field-effect transistors in 1960s, semiconductor manufacturing has aggressively pursued scaling that fruitfully resulted in tremendous advancement in device performances and realization of features sizes smaller than 10 nm. Due to many intrinsic material and technical obstacles, continuing the scaling progress of semiconductor devices has become increasingly arduous. As an effort to circumvent the areal limit, stacking devices in a three-dimensional fashion has been suggested. This approach is commonly called monolithic three-dimensional (M3D) integration. In this work, we examined technical issues that need to be addressed and overcome to fully realize energy efficiency, short latency and cost competency. Full-fledged M3D technologies are expected to contribute to various new fields of artificial intelligence, autonomous gadgets and unknowns, which are to be discovered.