• Title/Summary/Keyword: Integrated Architecture

Search Result 1,452, Processing Time 0.028 seconds

A Study on Development and Operation of Standards Information System (차세대 표준정보유통시스템 구축 및 운용에 관한 연구)

  • 구경철;이준섭;송기평;박기식
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2000.05a
    • /
    • pp.93-97
    • /
    • 2000
  • In an era of very rapid technological change, standardization organizations have been confronted with the problem that they should develop more new and more complex standards as strategic tools for enforcement of competitive power in shorter time according to the reduction of Life Cycle of products and the increase in the number of standards and their complexity. To cope with this challenge, we introduce the functionalities and development directions for implementing standardization information system. Also this paper describes the architecture of the next generation system for standard information that enabling information sharing and exchanging using XML. Finally, we suggest implementation framework of Standardization Vortal Site for the One-stop service of integrated standards information which provide users with standards development roadmap and give brief introduction to SOL(Standards On-Line) site which is operated by ETRI/PEC.

  • PDF

A 4to6 DSTM Architecture Supporting Transparent Connections from IPv4 Hosts to IPv6 Hosts in Integrated IPv6/IPv4 Networks (IPv6/IPv4 통합망에서 IPv4 호스트로부터 IPv6 호스트로의 투명한 연결을 지원하는 4to6 DSTM 구조)

  • Park Eun-yong;Lee Jae-hwoon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.5B
    • /
    • pp.287-294
    • /
    • 2005
  • It is impossible to replace overnight the present Internet Protocol Version 4(IPv4)-based Internet with Internet Protocol Version 6(IPv6). These two protocols are expected to coexist for a number of years during the transition period. A number of transition mechanisms are proposed by Internet Engineering Task Force(IETF) Next Generation Transition Working Group(Ngtrans WG). However, most of them provide only the mechanism to initiate sessions from hosts within the IPv6 network to those within the IPv4 network, but do not support the initiation from IPv4 hosts to IPv6 ones. In this paper, we propose the IPv4-to-IPv6 Dual Stack Transition Mechanism(4to6 DSTM) which can operate even in the case that IPv4 clients in the IPv4 network initiate connections with dual stack servers in the IPv6 network.

EAP-AKA Authentication without UICC for Interworking Authentication in Heterogeneous Wireless Networks (이질적인 무선 네트워크 환경에서 인증 연동을 위한 비 UICC 방식의 EAP-AKA 인증)

  • Choi, Jae-Duck;Jung, Sou-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.46 no.5
    • /
    • pp.168-177
    • /
    • 2009
  • This paper proposes the EAP-AKA scheme without UICC for extending its usage to existing WLAN/WiBro devices. To apply the current EAP-AKA scheme, the WLAN/WiBro devices require an external Universal Integrated Circuit Card (UICC) reader. If they don't use UICC due to cost overhead and architectural problem of device, the EAP-AKA scheme loses its own advantages in security and portability aspects. The proposed scheme uses the DH key algorithm and a password for non-UICC devices instead of using the long-term key stored in UICC. The main contribution is to maintain the security and portability of the EAP-AKA while being applied to non-3GPP network devices not equipped with UICC. Furthermore, it does not require major modifications of authentication architecture in 3GPP.

An 8b 52 MHz CMOS Subranging A/D Converter Design for ISDN Applications (광대역 종합 통신망 응용을 위한 8b 52 MHz CMOS 서브레인징 A/D 변환기 설계)

  • Hwang, Sung-Wook;Lee, Seung-Hoon
    • Journal of IKEEE
    • /
    • v.2 no.2 s.3
    • /
    • pp.309-315
    • /
    • 1998
  • This paper describes an 8b 52 MHz CMOS subranging analog-to-digital converter (ADC) for Integrated Services Digital Network (ISDN) applications. The proposed ADC based on the improved time-interleaved architecture removes the holding time which is typically observed in the conventional double-channel subranging ADCs to increase throughput rate. Moreover, the ADC employs the interpolation technique in the back-end subranging ADCs far residue signal processing to minimize die area and power consumption. The fabricated and measured prototype ADC in a 0.8 um n-well double-poly double-metal CMOS process typically shows a 52 MHz sampling rate at a 5 V supply voltage with 230 mW, and a 40 MHz sampling rate at a 3 V power supply with 60 mW power consumption.

  • PDF

Development of Advanced DSRC Packet Communication Technology (차세대 DSRC 패킷 통신 기술 개발)

  • Lee Hyun;Park In-Seong;Shin Chang-Sub;Oh Hyun-Seo;Yim Choon-Sik;Cho Kyoung-Rok
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.2 no.1 s.2
    • /
    • pp.93-100
    • /
    • 2003
  • In this farer, An ADSRC(Advanced Dedicated Short Range Communication) packet communication system developed by ETRI is introduced. The ADSRC system has been developed to provide high-speed, short-range wireless racket communication in roadside environment for mobile office services. The requirements of the ADSRC system for mobile office services and the system design specification to meet them with regard to mobile of nce environment are discussed. The ADSRC packet communication systems consist of the MAC(Medium Access Control) Processor block the OFDM() modem block and the RF block. The MAC processor block handles medium access control. The OFDM modem transmits data packets at up to 24Mbps adaptively and recovers the data from RF block. The ADSRC packet communication system architecture is described.

  • PDF

Design of a 2.5V 10-bit 300MSPS CMOS D/A Converter (2.5V 10-bit 300MSPS 고성능 CMOS D/A 변환기의 설계)

  • Kwon, Dae-Hoon;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.7
    • /
    • pp.57-65
    • /
    • 2002
  • In this paper, a 2.5V 10-bit 300MSPS CMOS D/A Converter is described. The architecture of the D/A Converter is based on a current steering 8+2 segmented type, which reduces non-linearity error and other secondary effects. In order to achieve a high performance D/A Converter, a novel current cell with a low spurious deglitchnig circuit and a novel inverse thermomeer decoder are proposed. To verify the performance, it is integrated with $0.25{\mu}m$ CMOS 1-poly 5-metal technology. The effective chip area is $1.56mm^2$ and power consumption is about 84mW at 2.5V power supply. The simulation and experimental results show that the glitch energy is 0.9pVsec at fs=100MHz, 15pVsec at fs=300MHz in worst case, respectively. Further, both of INL and DNL are within ${\pm}$1.5LSB, and the SFDR is about 45dB when sampling, frequency, is 300MHz and output frequency is 1MHz.

A Study of the UML modeling and simulation for an analysis and design of the reconnaissance UAV system (정찰용 무인기 체계 분석/설계를 위한 UML 모델링 및 시뮬레이션 연구)

  • Kim, Cheong-Young;Park, Young-Keun;Lee, Jun-Kyu;Kim, Myun-Yeol;Reu, Tae-Kyu
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.36 no.11
    • /
    • pp.1112-1120
    • /
    • 2008
  • The real-time distributed simulation at the present age concentrates on the construction of a system development environment in order to accomplish a synthetic battlefield environment connected with Live-Virtual-Constructive simulation and to realize the Simulation Based Acquisition which supports the life cycle of weapon system. Accordingly this paper describes the development environment of the UML modeling and simulation which integrates the system analysis and design methods performed during the conceptual design phase of the reconnaissance UAV system development. An integrated framework linked with the UML simulation and X-plane visualization is suggested to efficiently perform the system analysis and design, and finally the implementation contents, the analysis of experiment results and concluding remarks are described.

A Web-based Rapid Fabrication System for Optical Components (광학 부품의 웹 기반 쾌속제작 시스템)

  • Baek, Chang-Il;Chu, Won-Sik;Jung, Woo-Byeok;Jeon, Woo;Kim, Chi-Wan;Sung, Mi-Jung;Kang, Ji-Young;An, Sung-Hoon
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2003.06a
    • /
    • pp.30-33
    • /
    • 2003
  • In this paper the advantage of web technology applied to Rapid Prototyping is discussed. Two fabrication processes are chosen to be web-enabled. One, a post-process of FDM is developed to provide translucent plastic parts made of medical grade ABS material. The other, a system to fabricate laser machined Light Guide Panel is developed. In order to show the timesaving characteristics of the web-based tools, two websites are implemented (http://nano.gsnu.ac.kr/fdm & http://nano.gsnu.ac.kr/laser). The 3-tier architecture is applied for the Internet communication between designers and manufacturing sites, The integrated design tools and physical manufacturing processes enable designers to submit a new design and to receive the fabricated parts in an expedited manner. Example parts are fabricated using the web-based system to prove the concept of the web-based design and Rapid Prototyping.

  • PDF

Origin and Development of the Buddhist Rock Cave Temples of India - in Relation with Hinduism, Jainism, Ajivika - (인도 불교석굴사원의 사원과 전개 - 힌두교, 자이나교, 아지빅파의 관련과 함께 -)

  • Lee, Hee-Bong
    • Journal of architectural history
    • /
    • v.17 no.4
    • /
    • pp.129-152
    • /
    • 2008
  • Early Buddhist rock cave temples of India, in spite of being an origin of Buddhist temples, has little been studied in Korea. After field studies and an interpretation of their forms in conjunction with religious life, precedent theories are supplemented and refuted as follows. Starting from the 2nd century B,C., Buddhist ascetic disciples digged residential rock caves, called vihara, for protection from monsoon rain and hot weather, A typical arrangement was settled -a courtyard type, with 3 side rows of tiny one-person bedroom and a front veranda with columns. Also digged were Chaitya caves, in line with viharas, to worship, which is the tumulus of Buddha's relics. I suggest that the original type of chaitya a simple circle cave with a stupa, suitable for circumambulating ceremonies. I refute the existing theory presenting Barabar caves of Ajivika as a chaitya origin, featuring empty circular room without a stupa. I also interpret a typical apsidal plan as being a simple result of adding a place of worshipping rites in front of the stupa. Enclosing columns around a cylindrical stupa is a result of reinforcing both the divine space and circumambulating ceremonies, with elongation toward hall. Finally the chaitya came to have a grandeur apsidal plan with high vault ceiling nave and a side aisle as in Western cathedrals with large frontal horseshoe arch windows. The Buddha image, which had become a new worshipping object, was integrated into the stupa and interior surface. First the stupa and then the statue was introduced to residential Viharas. Therefore, I suggest that the vihara should be renamed as 'chaitya' as a worshipping place, by establishing statue rooms without bedrooms at all. The functionally changed vihara is similar in form to a 'rectangular type of chaitya', little known and developed in different routes. A columned inner courtyard gradually becama an offering place, like Hindu mandapa, Buddhist caves ware changed to a kind of Tantric and Hindu temple by means of statue worshipping offering rituals.

  • PDF

Convergence of Broadcasting and Communication in Home Network using E-PON based Home Gateway (EPON 기반 홈게이트웨이를 이용한 댁내 망에서의 방송통신 융합 서비스)

  • Park Wanki;Kim Daeyoung
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.42 no.6 s.336
    • /
    • pp.9-16
    • /
    • 2005
  • In this paper, we focus on supporting the convergence of broadcasting and communication in home network systems with E-PON based home gateway. We propose a new architecture to provide broadcasting and data services in integrated home network using overlay transport mechanism in access network and If multicast techniques of IGMP and IGMP snooping in home network. We also detail a set of mechanisms and procedures for home broadcasting service through the home gateway system. Our new scheme is composed of three parts: a) an overlay transmission model of video broadcasting signals (satellite and/or cable TV) and Internet data, b) to select a specific video broadcasting channel and to make of the selected video broadcasting stream into IP multicast packets in tuner/conversion module using multiple tuner system and c) to transfer the converted If multicast packets to L2 switch of home gateway's core module and to send them out to target port(s) by L2 multicast using IGMP snooping.