• Title/Summary/Keyword: Insulating Layer Thickness

검색결과 78건 처리시간 0.022초

SIPOS를 이용한 SOI RESURF 다이오드의 항복전압 특성 (Breakdown Voltage Characterization of SOI RESURF Diode Using SIPOS)

  • 신동구;한승엽;최연익;정상구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 C
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    • pp.1621-1623
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    • 1997
  • The breakdown voltage of SOI RESURF (REduce SURface Field) diode using a SIPOS (Semi Insulating POlycrystalline Silicon) layer is verified in terms of n-drift layer length and surface oxide thickness by device simulator MEDICI, and compared with conventional SOI RESURF diode. Increasing the n-drift layer length, the breakdown voltage of SOI RESURF diode using the SIPOS layer have increased and saturated at $8{\mu}m$. And it has decreased with increasing the surface oxide thickness.

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고휘도 백색방출 전계발광소자의 제작 및 특성 (Fabrication and Characteristics of High Brightness White Emission Electroluminescent Device)

  • 배승춘;김정환;박성근;권성렬;김우현;김기완
    • 센서학회지
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    • 제8권1호
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    • pp.10-15
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    • 1999
  • ZnS 형광체와 BST 강유전체 박막을 절연층으로 사용한 백색방출 전계발광소자를 제작하였다. BST 박막의 제조조건으로 target의 조성비가 $Ba_{0.5}Sr_{0.5}TiO_3$이며, 기판온도가 $400^{\circ}C$, 분위기압이 30 mTorr, A:$O_2$의 비가 9:1일때 유전율이 1 kHz의 주파수에서 209를 나타내었다. 형광층으로 ZnS:Mn, ZnS:Tb 및 ZnS:Ag를 사용하였으며, 활성제 각각의 첨가량은 0.8, 0.8 및 1 wt%로 하였다. 형광층 전체의 두께가 500 nm로 하고 하부 절연층을 200 nm, 상부절연층을 400 nm로 증착하였을 때, 박막 전계발광소자의 발광문턱전압은 약 95 V 였고, 최고휘도는 150 V에서 약 $3000\;cd/m^2$이었다. 발광스펙트럼를 관찰한 결과 청색영역(450 nm), 녹색영역(550 nm) 그리고 적색영역(600 nm)의 파장에서 각각의 피이크가 나타나는 것을 관찰하였다.

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하부전극 산소 열처리를 통한 강유전체 터널접합 구조 메모리 소자의 전기저항 변화 특성 분석 (Variations in Tunnel Electroresistance for Ferroelectric Tunnel Junctions Using Atomic Layer Deposited Al doped HfO2 Thin Films)

  • 배수현;윤소정;민대홍;윤성민
    • 한국전기전자재료학회논문지
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    • 제33권6호
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    • pp.433-438
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    • 2020
  • To enhance the tunneling electroresistance (TER) ratio of a ferroelectric tunnel junction (FTJ) device using Al-doped HfO2 thin films, a thin insulating layer was prepared on a TiN bottom electrode, for which TiN was preliminarily treated at various temperatures in O2 ambient. The composition and thickness of the inserted insulating layer were optimized at 600℃ and 50 Torr, and the FTJ showed a high TER ratio of 430. During the heat treatments, a titanium oxide layer formed on the surface of TiN, that suppressed oxygen vacancy generation in the ferroelectric thin film. It was found that the fabricated FTJ device exhibits two distinct resistance states with higher tunneling currents by properly heat-treating the TiN bottom electrode of the HfO2-based FTJ devices in O2 ambient.

벌크 마이크로 머쉬닝에 의한 다결정 실리콘 압력센서 제작 관한 연구 (A Study on Fabrication of Piezorresistive Pressure Sensor)

  • 임재홍;박용욱;윤석진;정형진;윤영수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.677-680
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    • 1999
  • Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.

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구형파 펄스를 인가한 정전분무 장치의 대전량 특성 (Charging Characteristics of Electrostatic Sprayer Applied Square Pulse)

  • 박승록;문재덕
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권12호
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    • pp.573-578
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    • 2003
  • In this study, new type of induction charging system for electrostatic spraying was manufactured and proposed to improve the electrical safety and charging efficiency. And parameters of proposed system to generate the maximum deposition current with electrical safety were selected and investigated. The selected parameters were frequency of square pulse and thickness of insulation material, outer diameter of device and thickness and positions of electrode. Charging quantity of water drop was measured by deposition current detected from sensing plate indirectly. The maximum deposition current for each parameter were 3.5[uA] at the frequency of 15[kHz] and thickness of 0.25[mm] insulating layer. And maximum deposition currents were 2.8[uA] and 3.0[uA] at 25[mm] outer diameter of charging device and 0.25[mm] thickness of electrode each. Effects of electrode position from spraying nozzle on deposition current was a little.

Metal-insulator Transition in $(Sr_{0.75},\;La_{0.25})TiO_3$ Ultra-thin Films

  • Choi, Jae-Du;Choi, Eui-Young;Lee, Yun-Sang;Lee, Jai-Chan
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2011년도 추계학술발표대회
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    • pp.19.2-19.2
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    • 2011
  • The $(Sr_{0.75},\;La_{0.25})TiO_3$ (SLTO) ultra-thin films with various thicknesses have been grown on Ti-O terminated $SrTiO_3$(100) substrate using Laser-Molecular Beam Epitaxy (Laser MBE). By monitoring the in-situ specular spot intensity oscillation of reflection high energy electron diffraction (RHEED), we controlled the layer-by-layer film growth. The film structure and topography were verified by atomic force microscopy (AFM) and high resolution thin film x-ray diffraction by the synchrotron x-ray radiation. We have also investigated the electronic band structure using x-ray absorption spectroscopy (XAS). The ultra thin SLTO film exhibits thickness driven metal-insulator transition around 8 unit cell thickness when the film thickness progressively reduced to 2 unit cell. The SLTO thin films with an insulating character showed band splitting in Ti $L_3-L_2$ edge XAS spectrum which is attributed to Ti 3d band splitting. This narrow d band splitting could drive the metal-insulator transition along with Anderson Localization. In optical conductivity, we have found the spectral weight transfer from coherent part to incoherent part when the film thickness was reduced. This result indicates the possibility of enhanced electron correlation in ultra thin films.

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다층형 단열재를 사용한 영구거푸집의 처짐 특성 (Deflection Characteristics of Permanent Formwork Using Multi-layer Insulation)

  • 류화성;신상헌;송성용;김득모
    • 한국건축시공학회:학술대회논문집
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    • 한국건축시공학회 2019년도 추계 학술논문 발표대회
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    • pp.130-131
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    • 2019
  • As part of recent low-energy policies, thermal insulation standards for buildings are being tightened every year. In addition, the conventional styrofoam insulating material has a problem that the thickness of the heat insulating material to achieve a standard heat permeability is rapidly increased. Due to the thick insulation, there is a high risk of spreading vulnerable structures such as fire due to lack of space between buildings. On the other hand, the method of using the insulation as a formwork is known to be excellent cost saving effect through the reduction of the formwork usage and the simplification of the external insulation work. In order to solve this problem, this study aims to fabricate a multi-layered insulator that combines high-performance phenolic foam insulation and styrofoam insulation and evaluate the deflection characteristics for use as formwork.

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비결합형 터널접합구조에서 Cr 하지층에 따른 전자기적 특성변화 (The Electromagnetic Properties in Uncoupled funnel-junction with Various Cr Seed Layer)

  • 박진우;전동민;윤성용;이종윤;서수정
    • 한국자기학회지
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    • 제13권3호
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    • pp.91-96
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    • 2003
  • 본 연구에서는 DC 마그네트론 스퍼터를 사용하여 Cr/Co/Al-Ox/Co/Ni-Fe 다층박막에 다양한 두께의 Cr 하지층을 삽입함에 따른 자기적 특성 및 전기적 특성에 관하여 연구하였다. 3 nm 두께의 Cr 하지층 증착시 자기저항비의 변화는 관찰할 수 없었고 적정한 Cr두께가 증가함에 따라 Co의 보자력이 크게 증가되었다 또한, 산화시간이 길수록 두 강자성층간에 보자력 차이 및 절연층의 저항이 점차 증가하였는데, 이는 산화시간에 따라 상부층 계면의 평탄성의 증가에 기인하는 것으로 생각되며 TEM을 통하여 확인할 수 있었다. Cr 하지층 유무에 관계없이 최고 자기저항비가 나타나는 절연층의 산화시간은 60~70초로 비슷하였지만 Cr 두께가 증가할수록 자기저항비는 감소하였다. 이는 전극간 계면의 거칠기의 증가로 인해 미반응 Al의 잔존 확률이 상대적으로 커짐에 따라 터널 전자의 산란이 증가함으로써 나타나는 것으로 생각된다. 이러한 결과로 Cr하지층의 두께는 3 nm로 고정하였으며 하지층의 증착 및 적정산화를 통하여 두 강자성층간에 큰 보자력 차이를 유도할 수 있었다. 이는 재현성에 있어서 가장 큰 문제점을 지닌 TMR 소자에 매우 긍정적인 해결방안을 제시할 수 있게 된다.̄

터널링 박막 두께 변화에 따른 부동 게이트 유기 메모리 소자 (Floating Gate Organic Memory Device with Tunneling Layer's Thickness)

  • 김희성;이붕주;신백균
    • 한국진공학회지
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    • 제21권6호
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    • pp.354-361
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    • 2012
  • 유기 메모리 절연막 제작을 위해 일반적으로 사용되어지는 습식법이 아닌 건식법 중 플라즈마 중합법을 이용하였다. 유기 절연 박막으로 사용된 단량체는 Styrene과 MMA을 사용하고, 터널링 박막은 MMA를 사용하며, 메모리 박막은 열기상증착법을 이용한 Au 박막을 사용하였다. 최적화된 소자의 구조는 Au의 메모리층의 두께를 7 nm, Styrene 게이트 절연막의 두께를 400 nm, MMA 터널링 박막의 두께를 30 nm로 증착하여 제작된 부동 게이트형 유기 메모리 소자는 40/-40 V의 double sweep시 27 V의 히스테리시스 전압을 얻을 수 있었다. 이 특성을 기준하여 유기 메모리의 전하 포집 특성을 얻을 수 있었다. 유기 재료 중 MMA 대비 Styrene의 전하 포집 특성이 좋은 것으로 보아 향후 부동 게이트인 Au 박막을 유기 재료인 Styrene으로 대체하여 플렉시블 소자의 가능성을 기대한다.

전도냉각되는 1-2kV급 고온초전도 직류리액터 전류도입부의 전기적 절연에 대한 연구 (Study on the Electrical Insulation of Current Lead in the conduction-cooled 1-2kV Class High-Tc Superconducting DC Reactor)

  • 배덕권;안민철;이찬주;정종만;고태국;김상현
    • 한국초전도ㆍ저온공학회논문지
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    • 제4권1호
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    • pp.30-34
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    • 2002
  • In this Paper, Insulation of current lead in the conduction-cooled DC reactor for the 1.2kV class 3 high-Tc superconducting fault current limiter(SFCL) is studied. Thermal link which conducts heat energy but insulates electrical energy is selected as a insulating device for the current lead in the conduction-cooled Superconducting DC reactor. It consists of oxide free copper(OFC) sheets, Polyimide films, glass fiberglass reinforced Plastics (GFRP) plates and interfacing material such an indium or thermal compound. Through the test of dielectric strength in L$N_2$, polyimide film thickness of 125 ${\mu}{\textrm}{m}$ is selected as a insulating material. Electrical insulation and heat conduction are contrary to each other. Because of low heat conductivity of insulator and contact area between electrical insulator and heat conductor, thermal resistance of conduction-cooled system is increased. For the reducing of thermal resistance and the reliable contact between Polyimide and OFC, thermal compound or indium can be used As thermal compound layer is weak layer in electrical field, indium is finally selected for the reducing of thermal resistance. Thermal link is successfully passed the test. The testing voltage was AC 2.5kVrms and the testing time was 1 hour.