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A Study on the Application of the Changing Theory of Sameumsamyang(三陰三陽) Pyobonjung(標本中) to Clinical Treatment - Focusing on doctor's Articles - (삼음삼양(三陰三陽) 표본중(標本中) 종화이론(從化理論)의 임상적(臨床的) 활용(活用)에 대한 고찰(考察) - 역대(歷代) 의가(醫家)의 논설(論說)을 중심으로 -)

  • Baik, You-Sang;Kim, Do-Hoon
    • Journal of Korean Medical classics
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    • v.27 no.3
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    • pp.167-182
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    • 2014
  • Objectives : In this article, an analysis of the changing theory(從化理論) of Sameumsamyang(三陰三陽) and Pyobonjung(標本中) in some important medical books, and the historical contexts of those is investigated. Methods : Primary literatures about the changing theory were searched by key words of Sameumsamyang and Pyobonjung in main medical texts, and then analyses and selecting of significant documents have followed. Results : The application of the changing theory to clinical treatment has been mainly done in the process of comprehension and practice about "Sanghanron(傷寒論)". Getting out of simple explanation about meaning of paragraphs in "Sanghanron", the clinical application has been expended to detail drug instruction and prescription managements. Conclusions : The changing theory of Sameumsamyang and Pyobonjung has been actively applied to supporting clinical treatment historically, not recognized merely as a ideal theory.

Knowledge Based Authoring System for Educational Contents (지식 기반 교육컨테츠 저작시스템)

  • Jang, Jae-Kyung;Kim, Ho-Sung
    • The Journal of Korean Association of Computer Education
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    • v.7 no.2
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    • pp.57-65
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    • 2004
  • For the purpose of an effective instruction-learning process by systematic management of knowledge between instructor and learner in e-Learning, we have developed the authoring system in which the instructor is able to author easily on various lecture frames according to the instructional design theory. The authored contents with the relations among the learning objects based on SCORM standard would help learner to conceptualize the contents. A knowledge map is constructed on the relations among the learning objects using RDF of the semantic web. We introduce the ontology in which the instructor can make a dictionary of terminology by registering the words of the teaching area. The learning activity and comprehension of students can be assessed using each student's learning map along the interaction points which are introduced to present the individual learning by considering each student's capacity of understanding and achievement.

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Timing analysis of RSFQ ALU circuit for the development of superconductive microprocessor (초전도 마이크로 프로세서개발을 위한 RSFQ ALU 회로의 타이밍 분석)

  • Kim J. Y;Baek S. H.;Kim S. H.;Kang J. H.
    • Progress in Superconductivity and Cryogenics
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    • v.7 no.1
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    • pp.9-12
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    • 2005
  • We have constructed an RSFQ 4-bit Arithmetic Logic Unit (ALU) in a pipelined structure. An ALU is a core element of a computer processor that performs arithmetic and logic operation on the operands in computer instruction words. We have simulated the circuit by using Josephson circuit simulation tools. We used simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in constructing the 4-bit ALU was consisted of three DC current driven SFQ switches and a half-adder. By commutating output ports of the half adder, we could produce AND, OR, XOR, or ADD functions. The circuit size of the 4-bit ALU when fabricated was 3 mm x 1.5 mm, fitting in a 5 mm x 5mm chip. The fabricated 4-bit ALU operated correctly at 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.

Development of an RSFQ 4-bit ALU (RSFQ 4-bit ALU 개발)

  • Kim J. Y.;Baek S. H.;Kim S. H.;Jung K. R.;Lim H. Y.;Park J. H.;Kang J. H.;Han T. S.
    • Progress in Superconductivity
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    • v.6 no.2
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    • pp.104-107
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    • 2005
  • We have developed and tested an RSFQ 4-bit Arithmetic Logic Unit (ALU) based on half adder cells and de switches. ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We have simulated the circuit by using Josephson circuit simulation tools in order to reduce the timing problem, and confirmed the correct operation of the designed ALU. We used simulation tools of $XIC^{TM},\;WRspice^{TM}$, and Julia. The fabricated 4-bit ALU circuit had a size of $\3000{\ cal}um{\times}1500{\cal}$, and the chip size was $5{\cal} mm{\times}5{\cal}mm$. The test speeds were 1000 kHz and 5 GHz. For high-speed test, we used an eye-diagram technique. Our 4-bit ALU operated correctly up to 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.

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How Different are Vowel Epentheses in Learner Speech and Loanword Phonology?

  • Park, Mi-Sun;Kim, Jong-Mi
    • Speech Sciences
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    • v.15 no.2
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    • pp.33-51
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    • 2008
  • Difference of learner speech and loanword phonology is investigated in terms of Korean learners' speech and their loanword adaptation of English words with a post-vocalic word-final stop. When we compared the speech of 12 Korean learners in mid-intermediate level with that of eight English speakers, the learner speech did not reflect loanword phonology of the vowel insertion after a voiced word-final stop (e.g., rib$[\dotplus]$, bad$[\dotplus]$, gag$[\dotplus]$ vs. tip[=], cat[=], book[=]), but, instead, the target phonology of vowel lengthening before a voiced word-final stop (e.g., rib[r.I:b], CAD$[k{\ae}:d]$, bag$[b{\ae}:g]$ vs. rip[rI.p], cat$[k{\ae}t]$, back$[b{\ae}k])$. A longitudinal study of learner speech before and after instruction showed some development toward the acquisition of target phonology. The results indicate that learner speech departs from loanword phonology, and approaches to target speech in a faster rate than direct ratio. Thus, native phonology predicts loanword phonology, but lends little support to learner speech. Our results also indicate that loanword phonology is constant, while learner speech changes toward the acquisition of target phonology.

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Study of the Superconductive Pipelined Multi-Bit ALU (초전도 Pipelined Multi-Bit ALU에 대한 연구)

  • Kim, Jin-Young;Ko, Ji-Hoon;Kang, Joon-Hee
    • Progress in Superconductivity
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    • v.7 no.2
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    • pp.109-113
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    • 2006
  • The Arithmetic Logic Unit (ALU) is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We have developed and tested an RSFQ multi-bit ALU constructed with half adder unit cells. To reduce the complexity of the ALU, We used half adder unit cells. The unit cells were constructed of one half adder and three de switches. The timing problem in the complex circuits has been a very important issue. We have calculated the delay time of all components in the circuit by using Josephson circuit simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. For high-speed tests, we used an eye-diagram technique. Our 4-bit ALU operated correctly at up to 5 GHz clock frequency.

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Development of a Controller for Polishing Robot Attached to Machining Center and Its Performance Evaluation

  • Go, Seok-Jo;Lee, Min-Cheol
    • 제어로봇시스템학회:학술대회논문집
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    • 1998.10a
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    • pp.346-351
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    • 1998
  • Cutting process has been automated due to progress of CNC and CAD/CAM, but polishing process has been only depended on experiential knowledge of expert. Polishing work for a curved surface die demands simple and repetitive operations but requires much time for its high precision. Therefore it is operated in the handiwork by skilled worker. However the workers intend to avoid gradually polishing work because of the poor environments such as dust and noise. In order to reduce the polishing time and solve the problem of shortage of skilled workers, it has been done some research for an automation of polishing. To automate the polishing process, a 2 axes polishing robot which is attached to a 3 axes machining center has been developed by our previous research. This automatic polishing robot is able to keep the polishing tool normal on the curved surface of die. Therefore its performance of polishing is improved because of always keeping the tool normal on the surface. In this paper, the smaller sized polishing robot is developed to improve polishing performance. And the controller for 2 axes polishing robot is developed. The controller is composed of TMS320C31 with high speed which is 40-ns instruction cycle time, RAM memory with 64K words, digital input with 64 bits, digital output with 32 bits, and D/A converter with 4 channels, which is 12 bits resolution. To evaluate polishing performance of this developed robot, polishing experiment for shadow mask was carried out.

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Rapid Data Allocation Technique for Multiple Memory Bank Architectures (다중 메모리 뱅크 구조를 위한 고속의 자료 할당 기법)

  • 조정훈;백윤홍;최준식
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.10a
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    • pp.196-198
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    • 2003
  • Virtually every digital signal processors(DSPs) support on-chip multi- memory banks that allow the processor to access multiple words of data from memory in a single instruction cycle. Also, all existing fixed-point DSPs have irregular architecture of heterogeneous register which contains multiple register files that are distributed and dedicated to different sets of instructions. Although there have been several studies conducted to efficiently assign data to multi-memory banks, most of them assumed processors with relatively simple, homogeneous general-purpose resisters. Therefore, several vendor-provided compilers fer DSPs were unable to efficiently assign data to multiple data memory banks. thereby often failing to generate highly optimized code fer their machines. This paper presents an algorithm that helps the compiler to efficiently assign data to multi- memory banks. Our algorithm differs from previous work in that it assigns variables to memory banks in separate, decoupled code generation phases, instead of a single, tightly-coupled phase. The experimental results have revealed that our decoupled algorithm greatly simplifies our code generation process; thus our compiler runs extremely fast, yet generates target code that is comparable In quality to the code generated by a coupled approach

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Steel frame fragility curve evaluation under the impact of two various category of earthquakes

  • Wang, Feipeng;Miao, Jie;Fang, Zhichun;Wu, Siqi;Li, Xulong;Momeni, Younes
    • Earthquakes and Structures
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    • v.22 no.1
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    • pp.15-23
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    • 2022
  • One of the key tools in assessing the seismic vulnerability of the structures is the use of fragile functions, which is the possibility of damage from a particular damage surface for several levels of risk from the seismic movements of the earth. The aim of this study is to investigate the effect of two categories of earthquake events on the fragile curve (FRC) of the steel construction system. In this study, the relative lateral displacement of the structures is considered as a damage criterion. The limits set for modifying the relative lateral position in the HAZUS instruction are used to determine the failure modes, which include: slight, moderate, extensive and complete. The results show, as time strong-motion increases, the probability of exceeding (PoE) increases (for Peak ground acceleration (PGA) less than 0.5). The increase in seismic demand increases the probability of exceeding. In other words, it increases the probability of exceeding, if the maximum earthquake acceleration increases. Also, 7-storey model in extensive mode has 20 and 26.5% PoE larger than 5- and 3-storey models, respectively.

A Study on Effectiveness and Preference of e-Learning Contents Delivery Types in Learning Domains (학습목표영역에 따른 이러닝 컨텐츠 전달 유형별 학습 효과성과 선호도에 대한 연구)

  • Yu, Byeong-Min;Lee, Byoung-Joon
    • Journal of Agricultural Extension & Community Development
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    • v.21 no.4
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    • pp.1029-1060
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    • 2014
  • The purpose of this study are to figure out whether there are the meaningful differences between learner's learning achievements and contents preference in accordance with the delivery strategies (instructor-focused model, learner-focused model) of learning materials suggested by Bloom in web-based instruction, and to suggest the various options on the contents delivery strategies to improve the learner's learning achievements of each learning domains. Learning domains were divided by the cognitive domain, the affective domain, and the psychomotor domain. The result of research with 182 learners showed that learner-focused model in the cognitive domain caused higher learning achievements and preference than instructor-focused model. And instructor-focused model in the psychomotor domain compared with learner-focused model caused higher learning achievements and preference. However, there were less meaningful differences in the affective domain. In other words, learner-focused model is appropriate to the feature of the cognitive domain while instructor-focused model is appropriate to the feature of the psychomotor domain. The results suggest that delivery strategies should be chosen by domains of learning contents in order to improve learner's learning achievements in web-based instruction. Learner-focused delivery strategies in the cognitive domain and instructor-focused delivery strategies in the psychomotor domain need to be considered positively. Delivery strategies should be studied and developed in order to lead higher learning achievements and preference.