• Journal of The Korean Association For Science Education
• /
• v.27 no.5
• /
• pp.379-393
• /
• 2007

The purpose of this article is to analyze the conceptual change of nine 11th graders after implementing the model-based instruction of blood circulation by multidimensional framework, and to find some implications about teaching strategies for improving conceptual understanding. The model-based instruction consisted of 4 periods: (1) introduction for inducing students' interests using an episode in the science history of blood circulation, (2) vivisectional experiment on rats, (3) visual-linguistic model instruction using the videotape of heartbeat, and (4) modeling activity on the path of blood flow. Based on the data from pre-test, post-test and interviews, we classified students' models on the path of blood flow, and investigated their ontological features and the conceptual status of blood circulation. Most students could describe the path of blood flow and the changes of substances in blood precisely after the instructions. However, the modeling activity were not sufficient to improve students' understanding of the mechanisms of the blood distribution throughout various organs and the material exchanges between blood and tissues. From the interview of 9 students, we acquired informative results about conceptual status elements that were helpful to, preventing from, or not used for students' understanding. It was also found that conceptual status of students depended on the ontological categories into which students' conceptions of blood circulation fell. The results of this study can help design the effective teaching strategy for the understanding of concept of the equilibrium category.

• International Journal of Control, Automation, and Systems
• /
• v.1 no.3
• /
• pp.339-350
• /
• 2003

In this paper, we propose a simultaneous multithreading (SMT) architecture that improves instruction throughput by exploiting instruction level parallelism (ILP) and thread level parallelism (TLP). The proposed architecture issues and completes instructions belonging to the same thread in exact program order. The issue and completion policy greatly reduces the design complexity and hardware cost of our architecture, compared with others that employ out-of-order issue and completion. On the other hand, when the instructions belong to different threads, the issue and completion orders for those instructions may not necessarily be identical to the fetch order. The processor issues instructions simultaneously from multiple threads to functional units by exploiting ILP and TLP, and by dynamic resource sharing. That parallel execution notably improves performance and resource utilization with minimal additional hardware cost over the conventional superscalar processors. This paper proposes an SMT architecture with grouping as well as one without grouping. Without grouping, all threads dynamically and flexibly share most resources. On the other hand, in the SMT architecture with grouping, in which resources and threads are divided into several groups for design simplification, resources are shared only among threads belonging to the same group as those resources. Simulation results show that our processors with four and eight threads improve performance by three or more times over the conventional superscalar processor with comparable execution resources and policies, and that reasonable grouping reduces the design complexity of SMT processors with little negative effect on performance.

• Journal of Korea Society of Digital Industry and Information Management
• /
• v.11 no.2
• /
• pp.55-66
• /
• 2015

In this paper, we design and implement a two-way search algorithm that can provide a customized service through the user with real-time two-way communication using a mobile instant messaging service. Therefore, we design and implement the automative search system which enables delivering message to each user mobile terminal from a plurality of relay mobile terminals by utilizing the mobile instant messenger, not to deliver a message from the main server to the mobile instant messenger user directly. Two-way search system using the mobile instant messenger can be immediately collect the user's response is easy to identify the orientation of each user, and thus can be provided to establish a differentiated service plan. Also, It provides a number of services(text, photos, videos, etc) in real-time information to the user by utilizing the mobile instant messenger service without the need to install a separate application. Experiment results, data processing speed of the category processing way to search for the data of the DB server from a user mobile terminal is about 7.06sec, data processing number per minute is about 13 times. The data processing speed of the instruction processing way is about 3.10sec, data processing number per minute is about 10 times. The data processing speed of the natural language processing way is about 5.13sec, per data processing number per minute is about 7 times. Therefore in category processing way, command processing way and natural language processing way, instruction processing way is the most excellent in aspect of data processing speed, otherwise in aspect of per data processing number per minute, the category processing way is the best method.

• The Journal of the Korea Contents Association
• /
• v.13 no.8
• /
• pp.474-481
• /
• 2013

The purpose of this study is that pre-service teacher are able to design creative instruction based on NFTM-TRIZ for building up their continuous creative thinking and promoting their creative instruction activities. NFTM-TRIZ is a educational technology system to form and develop creative thinking from child to adult continuously based on TRIZ theory. TRIZ is the thinking technique of creative problem solving that can be the tool of inventory solutions by finding and get over the key of contradiction that is necessary to obtain ideal final results of suggested problems. The subjects for this study were 90 pre-service teachers who are attending third and fourth graders of Teachers' College in G university and are taking 'Curriculum and Educational Evaluation'. The creativity program for this study was carried out for ten minutes at the end of lectures. The verification for this study results were performed two faces. First, pre-service teachers presented teaching and learning plan for one time used 8 Steps' Teaching and Learning Model based on NFTM-TRIZ. Second, researcher got feedback from them about this creative program.

• Journal of KIISE:Computer Systems and Theory
• /
• v.34 no.3
• /
• pp.113-123
• /
• 2007

This paper presents a high-performance elliptic curve cryptographic processor over $GF(2^m)$. The proposed design adopts Lopez-Dahab Montgomery algorithm for elliptic curve point multiplication and uses Gaussian normal basis for $GF(2^m)$ field arithmetic operations. We select m=163 which is the smallest value among five recommended $GF(2^m)$ field sizes by NIST and it is Gaussian normal basis of type 4. The proposed elliptic curve cryptographic processor consists of host interface, data memory, instruction memory, and control. We implement the proposed design using Xilinx XCV2000E FPGA device. Based on the FPGA implementation results, we can see that our design is 2.6 times faster and requires significantly less hardware resources compared with the previously proposed best hardware implementation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.36 no.1B
• /
• pp.71-79
• /
• 2011

This paper proposes a compiled-code simulator generation system based-on machine description language for efficient design space exploration in designing an embedded system optimized for a specific application. The proposed system generates a compiled-code simulator which maintains the functional accuracy of an event-driven simulator by determining instruction fetch and decoding processes statically. Generated simulator takes instruction-level and cycle-level simulation for estimating performances in embedded core. To show the efficiency of the constructed compiled-code simulator generator, architecture exploration had been performed for the JPEG encoder application. Starting with MIPS R3000 processor for one embedded core, the proposed system can produce the core showing optimized execution time for the application programming. In this process, a huge amount of simulation time has been used. Cycle-level compiled-code simulator has the functional accuracy and shows performance improvement by 21.7% in terms of simulation speed on the average when compared with an event-driven simulator.

• KIPS Transactions on Computer and Communication Systems
• /
• v.11 no.1
• /
• pp.1-8
• /
• 2022

RISC-V is an open-source instruction set architecture which has a simple base structure and can be extensible depending on the purpose. In this paper, we designed a small and low-power 32-bit RISC-V processor to establish the base for research on RISC-V embedded systems. We designed a 2-stage pipelined processor which supports RISC-V base integer instruction set except for FENCE and EBREAK instructions. The processor also supports privileged ISA for trap handling. It used 1895 LUTs and 1195 flip-flops, and consumed 0.001W on Xilinx Zynq-7000 FPGA when synthesized using Vivado Design Suite. GPIO, UART, and timer peripherals are additionally used to compose the system. We verified the operation of the processor on FPGA with FreeRTOS at 16MHz. We used Dhrystone and Coremark benchmarks to measure the performance of the processor. This study aims to provide a low-power, high-efficiency microprocessor for future extension.

• Journal of Practical Engineering Education
• /
• v.16 no.4
• /
• pp.481-489
• /
• 2024

The purpose of this study is to propose a new teaching method of the digital logic circuit so that students can cultivate digital literacy in diversifying future educational environments. In this paper, we analyzed the previous studies related to teaching methods for Tinkercad and digital logic circuits and suggested how to apply Tinkercad to the specific instruction design of the digital logic circuit. In addition, after showing the class design using Tinkercad to the actual lessons, It turns out two significant facts in a survey: to create a circuit that can implement the operation of the basic gate and to make it easier to understand the principles of the basic gate. The teaching method suggested in this study can be informative for students to acquire basic knowledge of electricity and electronics. Since Tinkercad is an open software based on cloud systems that are used not only in Korea but also foreign countries, it can be utilized in the lessons of digital logic circuits in the near future.

• Journal of the Korea Furniture Society
• /
• v.19 no.2
• /
• pp.141-150
• /
• 2008

Exploring on two major questions: 'Why do we feel more love for certain objects?' and 'How can design use this knowledge to realize design sustainability?', this article presents an alternative way of approaching the problem of design sustainability from the perspective that our relationships with design objects are of an extended mode of social relations. Recent discussions on design sustainability have transformed the notion of the problem by seeing it as a problem of our basic perception of design objects and our relationships with them. In this light, I propose that design sustainability could not be achieved solely by approaching from a mechanistic perspective, but by re-framing the way we see and relate things around us and by supporting our changes and actions to move forward a more sustainable notion of our relationships with the objects. As a way to realize design sustainability, I propose that design should involve story-making quality that supports our initiatives to build more affectional relations with objects by seeing the objects as entities of communication that tell stories of us, thus reflect our identities and meanings of our lives. Proceeding on the exploration of the subject, I present some of conceptual outlines in forms of an image diary, an interplay-able furniture unit, and a performance instruction that suggest a way for a special story-making process and thus a stronger emotional tie with the objects.

• Proceedings of the IEEK Conference
• /
• 2001.06b
• /
• pp.269-272
• /
• 2001

In this paper we proposed the format converter design and implementation for real time image processing. This design method is based on realized the large processor-per-pixel array by integrated circuit technology in which this two types of integrated structure is can be classify associative parallel processor and parallel process with DRAM cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilized the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start