• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.352-354
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• 2004

In this paper, a parallel fuzzy controller for one degree of freedom magnetic levitation is designed and its performance is compared with the performance of a PID controller. Input, output scaling factor of fuzzy controller and gain of PID controller were tuned using the GA algorithm. The designed controllers are validated by numerical simulations. So it's shown that parallel fuzzy controller can give the better performance for the plant than PID controller.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.300-302
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• 1996

In this paper a new series-parallel compensated uninterruptible power supply is proposed. Its series compensator shapes input current to sinusoid. The power handled by series compensator is only a quarter of ratings. And parallel compensator delivers sinusoidal voltage to nonlinear load. The parallel compensator is backedup with battery. This system has capabilities of power line conditioner and backup power with reduced size.

• ETRI Journal
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• v.13 no.2
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• pp.34-41
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• 1991

In this paper, a new distributed parallel algorithm for pattern classification based upon Self-Organizing Neural Network(SONN)[10-12] is developed. This system works without any information about the number of clusters or cluster centers. The SONN model showed good performance for finding classification information, cluster centers, the number of salient clusters and membership information. It took a considerable amount of time in the sequential version if the input data set size is very large. Therefore, design of parallel algorithm is desirous. A new distributed parallel algorithm is developed and experimental results are presented.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.6
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• pp.492-499
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• 2000

In this paper, realization techniques of the parallel processing and the parallel network system for image processing are described. The parallel image processing system is constructed by the characterization of image processing and processor. Several problems are solved to achieve effective parallel processing and processor networking with the particular properties of image processing, which are reduction of communication quantity, equalization of load and delay depreciation on communication. A parallel image input device is developed for the flexible networking of parallel image processing. An abnormal region detection algorithm which is the basic function in machine vision is applied to evaluate the constructed parallel image processing system. The performance and effectiveness of the system are confirmed by experiments.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.86-92
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• 2009

This paper presents development of 6kw ZVS(Zero Voltage Switching) boost converter by 4-parallel operation. To realize a high capacity converter with 6 kw, 4-parallel operation of 1.5kW unit module is proposed in this paper. To meet high ratio input to output voltage, isolated type booster converter is designed. To achieve ZVS operation of 4-switches of full bridge and protect a voltage overshoot caused by switch turn-off, simple active-clamp circuit is applied to the primary side. For parallel operation of 4-modules, master-slave control method is proposed to achieve input current sharing of 4-unit converter modules accurately. For performance tests, simulation is carried out. Also, load and experimental tests of the developed booster converter, 230Vdc/6kW, are carried out under various conditions. For field tests, the developed converter is applied for boosting a battery power to high DC_link voltage for a VSI inverter which starts a micro-turbine(MT) installed in vehicle and it's performance is verified through high speed motoring a MT up to tens of thousands of rpm.

• Journal of the Institute of Convergence Signal Processing
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• v.16 no.1
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• pp.1-8
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• 2015

In many image processing tasks, connected component labeling (CCL) is performed to extract regions of interest. CCL was usually done in a sequential fashion when image resolution was relatively low and there are small number of input channels. As image resolution gets higher up to HD or Full HD and as the number of input channels increases, sequential CCL is too time-consuming to be used in real time applications. To cope with this situation, parallel CCL framework was introduced where multiple cores are utilized simultaneously. Several parallel CCL methods have been proposed in the literature. Among them are NSZ label equivalence (NSZ-LE) method[1], modified 8 directional label selection (M8DLS) method[2], and HYBRID1 method[3]. Soh [3] showed that HYBRID1 outperforms NSZ-LE and M8DLS, and argued that HYBRID1 is by far the best. In this paper we propose an improved hybrid parallel CCL algorithm termed as HYBRID2 that hybridizes M8DLS with label backtracking (LB) and show that it runs around 20% faster than HYBRID1 for various kinds of images.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.11
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• pp.768-775
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• 2004

The SSA technique in the digital circuit test is required to be repeated the input pattern stream to n bits output nodes n times in case of using a multiplexor. Because the method adopting a parallel/serial bit convertor to remove this inefficiency has disadvantage of requiring the test time n times for a pattern, the test strategy is required, which can enhance the test productivity by reducing the test time based on simplified fault detection mechanism. Accordingly, this paper proposes a test strategy which enhances the test productivity and efficiency by appling PAS (Parallel Signature Analysis) technique to those after analyzing the structure and characteristics of the digital devices including TTL and CMOS family ICs as well as ROM and RAM. The PSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Resister) representing the characteristic equation. Also, the method to obtain the optimal signature analyzer is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.

• ETRI Journal
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• v.31 no.5
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• pp.510-517
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• 2009

A high throughput parallel decoding method is developed for context-based adaptive variable length codes. In this paper, several new design ideas are devised and implemented for scalable parallel processing, a reduction in area, and a reduction in power requirements. First, simplified logical operations instead of memory lookups are used for parallel processing. Second, the codes are grouped based on their lengths for efficient logical operation. Third, up to M bits of the input stream can be analyzed simultaneously. For comparison, we designed a logical-operation-based parallel decoder for M=8 and a conventional parallel decoder. High-speed parallel decoding becomes possible with our method. In addition, for similar decoding rates (1.57 codes/cycle for M=8), our new approach uses 46% less chip area than the conventional method.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.1 no.1
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• pp.119-124
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• 2001

In this pattern recognition on the large volumes of remote sensing satellite images, the inference time is much increased. In the case of the remote sensing data [5] having 4 wavebands, the 778 training patterns are learned. Each land cover pattern is classified by using 159, 900 patterns including the trained patterns. For the fuzzy classification, the 778 fuzzy rules are generated. Each fuzzy rule has 4 fuzzy variables in the condition part. Therefore, high performance parallel fuzzy inference system is needed. In this paper, we propose a novel parallel fuzzy inference system on T3E parallel computer. In this, fuzzy rules are distributed and executed simultaneously. The ONE_To_ALL algorithm is used to broadcast the fuzzy input to the all nodes. The results of the MIN/MAX operations are transferred to the output processor by the ALL_TO_ONE algorithm. By parallel processing of the fuzzy rules, the parallel fuzzy inference algorithm extracts match parallelism and achieves a good speed factor. This system can be used in a large expert system that ha many inference variables in the condition and the consequent part.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.1
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• pp.10-15
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• 2004

We present a state-space approach to make non-square linear systems strictly passive by using an input-dimensional parallel feedforward compensator. A necessary and sufficient condition for the existence of the parallel feedforward compensator is given by the static output feedback formulation, which enables to utilize linear matrix inequality. By modifying the structure of the compensator the additional technical assumption in the previous result [1] is removed. The effectiveness of the proposed method is illustrated by some numerical examples which can be stabilized by the proportional-derivative (PD) and proportional-derivative-integral (PID) control laws. The proposed control scheme can successfully replace the measurements of derivative terms in the control laws.