• Title/Summary/Keyword: Input queuing

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On-line visin system for transistor inspection (트랜지스터 검사용 온라인 비젼 시스템)

  • 노경완;전정희;김충원
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.769-772
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    • 1998
  • This paper present an efficient techniques for visual inspection of taped electronic parts, suitable for real time implementation. The main environments of developed system are IBM-compatible personal computer, frame grabber, digital input-output board. It is connected to the programmable logic controller unit of the taping machine in real time. Using a queuing structure, operator or extractor machine can remove easily the defect one from production line. Also, we design a new illumination system for sacquring shape and subface features of object. Therefore, it redue pre-processing step and processing time.

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Queuing Time Computation Algorithm for Sensor Data Processing in Real-time Ubiquitous Environment (실시간 유비쿼터스 환경에서 센서 데이터 처리를 위한 대기시간 산출 알고리즘)

  • Kang, Kyung-Woo;Kwon, Oh-Byung
    • Journal of Intelligence and Information Systems
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    • v.17 no.1
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    • pp.1-16
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    • 2011
  • The real-time ubiquitous environment is required to be able to process a series of sensor data within limited time. The whole sensor data processing consists of several phases : getting data out of sensor, acquiring context and responding to users. The ubiquitous computing middleware is aware of the context using the input sensor data and a series of data from database or knowledge-base, makes a decision suitable for the context and shows a response according to the decision. When the real-time ubiquitous environment gets a set of sensor data as its input, it needs to be able to estimate the delay-time of the sensor data considering the available resource and the priority of it for scheduling a series of sensor data. Also the sensor data of higher priority can stop the processing of proceeding sensor data. The research field for such a decision making is not yet vibrant. In this paper, we propose a queuing time computation algorithm for sensor data processing in real-time ubiquitous environment.

Design of Switching Fabric Supporting Variable Length Packets (가변 길이 패킷을 지원하는 스위칭 패브릭의 설계)

  • Ryu, Kyoung-Sook;Kim, Mu-Sung;Choe, Byeong-Seog
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.3
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    • pp.311-315
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    • 2008
  • The switching fabric used to make high speed switching for packet transfer between input and output interface in recent internet environments. Without making any changes in order to remain ATM switching fabric, the existing structures should split/reassemble a packet to certain size, set aside cross-point buffer and will put loads on the system. In this paper, we proposed a new switch architecture, which has separated data memory plane and switching plane packet data will be stored on the separate memory structure and simultaneously only the part of the memory address pointers can pass the switching fabric. The small mini packets which have address pointer and basic information would be passed through the switching fabric. It is possible to achieve the remarkable switching performance than other switch fabrics with contending variable length packets.

Analysis of a Queueing Model with a Two-stage Group-testing Policy (이단계 그룹검사를 갖는 대기행렬모형의 분석)

  • Won Seok Yang
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.45 no.4
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    • pp.53-60
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    • 2022
  • In a group-testing method, instead of testing a sample, for example, blood individually, a batch of samples are pooled and tested simultaneously. If the pooled test is positive (or defective), each sample is tested individually. However, if negative (or good), the test is terminated at one pooled test because all samples in the batch are negative. This paper considers a queueing system with a two-stage group-testing policy. Samples arrive at the system according to a Poisson process. The system has a single server which starts a two-stage group test in a batch whenever the number of samples in the system reaches exactly a predetermined size. In the first stage, samples are pooled and tested simultaneously. If the pooled test is negative, the test is terminated. However, if positive, the samples are divided into two equally sized subgroups and each subgroup is applied to a group test in the second stage, respectively. The server performs pooled tests and individual tests sequentially. The testing time of a sample and a batch follow general distributions, respectively. In this paper, we derive the steady-state probability generating function of the system size at an arbitrary time, applying a bulk queuing model. In addition, we present queuing performance metrics such as the offered load, output rate, allowable input rate, and mean waiting time. In numerical examples with various prevalence rates, we show that the second-stage group-testing system can be more efficient than a one-stage group-testing system or an individual-testing system in terms of the allowable input rates and the waiting time. The two-stage group-testing system considered in this paper is very simple, so it is expected to be applicable in the field of COVID-19.

THREE-DIMENSIONAL ROUND-ROBIN SCHEDULER FOR ADVANCED INPUT QUEUING SWITCHES (고속 입력큐 스위치 패브릭을 위한 3차원 라운드로빈 스케줄러)

  • Jeong, Gab-Joong;Lee, Bhum-Cheol
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.373-376
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    • 2003
  • This paper presents a new, three-dimensional round-robin scheduler that provides high throughput and fair across in an advanced input-queued packet switch using shared input buffers. We consider an architecture in which each input port group shares a common buffer and maintains a separate queue for each output, which is ratted the distributed common input buffer switch. In an NxN switch, our scheduler determines which queue in the total MxN input queues is served during each time slot where M is the number of common buffers. We suppose that each common buffer has K input ports and K output ports, and manages N output queues. The 3DRR scheduler determines MxK queues in every K(M) cycle when $K\geq$M (K$\leq$M), and provides massively parallel processing for the applications of high-speed switches with a large number of ports. The 3-DRR scheduler can be implemented using duplicated simple logic components allowing very high-speed implementation.

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Preventing Network Performance Interference with ACK-Separation Queuing Mechanism in a Home Network Gateway using an Asymmetric Link (비대칭 링크를 사용하는 홈 네트워크 게이트웨이에서 네트워크 성능 간섭 현상을 막기 위한 패킷 스케줄링 기법)

  • Hong, Seong-Soo
    • Journal of KIISE:Computing Practices and Letters
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    • v.12 no.1
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    • pp.78-89
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    • 2006
  • In development of network-enabled consumer electronics, much of the time and effort is spent analyzing and solving network performance problems. In this paper, we define an instance of such problems discovered while developing a commercial home network gateway. We then analyze its cause and propose a solution mechanism. Our home network gateway uses art asymmetric link (ADSL) and suffers from an undesirable phenomenon where downlink traffic interferes with upload speed. We call this phenomenon the network performance interference problem. While this problem can easily be confused with receive livelock caused by packet contention at the input queue, we and that this is not the case. By performing extensive experiments and analysis, we reveal that our problem is caused by packet contention at the output queue and certain intrinsic characteristics of TCP. We devise an ACK-separation queuing mechanism for this problem and implement it in the home network gateway Our experiments show that it effectively solves the problem.

A Study on Implementation of a MPLS Router Supporting Diffserv for QoS and High-speed Switching

  • Lee, Tae-Won;Kim, Young-chul
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1847-1850
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    • 2002
  • In this paper, MPLS Router module supporting Differentiated Service(Diffserv) for quality of Service (QoS) and High-speed switching is proposed and implemented. And we compare and analyze the proposed architecture with the conventional one in terms of CLR (Cell Loss Rate) and average delay. Switch is an extended system of Queue of each VOQ and PHB in the manner of Input Queuing for QoS. Algorithm, Priority-iSLIP is used for its scheduling algorithm. The proposed architecture is modeled in C++ and verified.

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Empirical Evaluation of BIM Coordinator Performance using Queuing Model in Construction Phase (대기행렬 모형을 활용한 시공단계 BIM 코디네이터 업무 성과 분석)

  • Ham, Nam-Hyuk;Yuh, Ok-Kyung;Ji, Kyu-Hyun
    • Journal of KIBIM
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    • v.8 no.3
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    • pp.31-42
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    • 2018
  • This study focuses on the BIM request for information(RFI) processing performance and quantitatively analyzes the performance of the BIM coordinator and the loss due to the waiting of the project participants. For these purposes, a method to quantitatively evaluate the performance of the BIM coordinator was proposed using a queueing model. For the verification, two projects in which BIM was applied in the construction phase were selected, and the BIM RFI data were collected through the analysis of the BIM monthly report and BIM coordinator work log of each project. In addition, the BIM input personnel, labor cost, and productivity data were collected through interviews with the experts of the case projects. The analysis of the BIM RFI processing performance of the BIM coordinator using the queueing model exhibited on a probabilistic basis that the waiting status of the project participants could vary depending on the preliminary BIM application to the design verification as well as the input number and level of the BIM coordinator personnel. In addition, the loss cost due to the waiting of the project participants was analyzed using the number of BIM RFIs waiting to be processed in the queueing system. Finally, the economic feasibility analysis for the optimal BIM coordinator input was performed considering the loss cost. The results of this study can be used to make decisions about the optimal BIM coordinator input and can provide grounds for the BIM return on investment (ROI) analysis considering the waiting cost of the project participants.

Common Spectrum Assignment for low power Devices for Wireless Audio Microphone (WPAN용 디지털 음향기기 및 통신기기간 스펙트럼 상호운용을 위한 채널 할당기술에 관한 연구)

  • Kim, Seong-Kweon;Cha, Jae-Sang
    • Journal of the Korean Institute of Intelligent Systems
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    • v.18 no.5
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    • pp.724-729
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    • 2008
  • This paper presents the calculation of the required bandwidth of common frequency bandwidth applying queueing theory for maximizing the efficiency of frequency resource of WPAN(Wireless Personal Area Network) based Digital acoustic and communication devices. It assumed that LBT device(ZigBee) and FH devices (DCP, RFID and Bluetooth) coexist in the common frequency band for WPAN based Digital acoustic and communication devices. Frequency hopping (FH) and listen before talk (LBT) have been used for interference avoidance in the short range device (SRD). The LBT system transmits data after searching for usable frequency bandwidth in the radio wave environment. However, the FH system transmits data without searching for usable frequency bandwidth. The queuing theory is employed to model the FH and LBT system, respectively. As a result, the throughput for each channel was analyzed by processing the usage frequency and the interval of service time for each channel statistically. When common frequency bandwidth is shared with SRD using 250mW, it was known that about 35 channels were required at the condition of throughput 84%, which was determined with the input condition of Gaussian distribution implying safety communication. Therefore, the common frequency bandwidth is estimated with multiplying the number of channel by the bandwidth per channel. These methodology will be useful for the efficient usage of frequency bandwidth.

Traffic Analysis Model for Exit Ramp Congestion at Urban Freeway (고속도로 진출램프 대기행렬 발생 현상 분석모형 개발)

  • Jeon, Jae-Hyeon;Kim, Young-Chan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.9 no.3
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    • pp.30-40
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    • 2010
  • The freeway congestion is largely generated by a mainline spillover of the exit ramp queue. So it is necessary to study for modeling of the phenomenon and applying the model. In this study, the authors evaluated applicability of the Supply-Demand model, which can express traffic flow for the freeway by applying flexibly supply and demand curves for capacity of the freeway. First the authors proposed methods processing input data required in the Supply-Demand model, such as sending & receiving functions and time-varying capacity constraints for the freeway mainline. After modeling the Supply-Demand application model, the authors applied the model to the site including congested Hongeun exit ramp in Seoul Ring-road, and improved the model by adjusting application techniques and calibrating parameters. The result of the analysis showed that the Supply-Demand model yielded a queuing pattern and queue location similar to them observed in the field data, and applicability of the Supply-Demand model was varified.