• Journal of information and communication convergence engineering
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• v.17 no.4
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• pp.285-289
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• 2019

A 1.9-GHz linear CMOS power amplifier is presented. An adaptive bias circuit (ABC) that utilizes an AC ground to detect the power level of the input signal is proposed to enhance the linearity and efficiency of the power amplifier. The ABC utilizes the second harmonic component as the input to mitigate the distortion of the fundamental signal. The input power level of the ABC was detected at the AC ground located at the V_DD node of the power amplifier. The output of the ABC was fed into the inputs of the power stage. The input signal distortion was mitigated by detecting the input power level at the AC ground. The power amplifier was designed using a 180 nm RFCMOS process to evaluate the feasibility of the application of the proposed ABC in the power amplifier. The measured output power and power-added efficiency were improved by 1.7 dB and 2.9%, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.5
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• pp.1240-1255
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• 1996

This paper suggests power optimization technique in multi-level SCPC system as a method for efficient utilization of limited satellite power. The power optimization is realized by optimal assignment of satellite input carrier powers considering interference and noise generated in up-link and down-link. The Fletcher-Powell algorithm searching minimum(or maximum) point using gradient information is used to detemine the optimal input carrier powers. To apply Flectcher-Powell algorithm mathematical descriptions and their partial derivatives to interference and nose are presented. Because a target, which should be optimized, is satellite input carrier power, amplitude of each carrier group will be assumed to be an independent variable. The performance criterion for optimal power assignmentis classified into 4 categories with respect to CNR of destination receiver earth station to meet the requirement for various satellite link environment. Simulation results for two-level, four-level and six-level SCPC system are presented.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.101-104
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• 2002

This paper propose that is algorithm of power dissipation reduction in the high level synthesis design for DSP(Digital Signal Processor), as the portable terminal system recently demand high power dissipation. This paper obtain effect of power dissipation reduction and switching activity that increase correlation of operands as input data of function unit. The algorithm search loop or repeatedly data to the input operands of function unit. That can be reduce the power dissipation using the new low power high level synthesis algorithm. In this Paper, scheduling operation search same nodes from input DFG(Data Flow Graph) with correlation coefficient of first input node and among nodes. Function units consist a multiplier, an adder and a register. The power estimation method is added switching activity for each bits of nodes. The power estimation have good efficient using proposed algorithm. This paper result obtain more Power reduction of fifty percents after using a new low power algorithm in a function unit as multiplier.

• Journal of electromagnetic engineering and science
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• v.15 no.3
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• pp.181-184
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• 2015

Evaluation of radiating radiofrequency fields from hand-held and body-mounted wireless communication devices to human bodies are conducted by measuring the specific absorption rate (SAR). The uncertainty of system validation and probe calibration in SAR measurement depend on the variation of RF power used for the validation and calibration. RF input power for system validation or probe calibration is controlled manually during the test process of the existing systems in the laboratories. Consequently, a long time is required to reach the stable power needed for testing that will cause less uncertainty. The standard uncertainty due to this power drift is typically 2.89%, which can be obtained by applying IEC 62209 in a normal operating condition. The principle of the Automatic Input Power Level Control System (AIPLC), which controls the equipment by a program that maintains a stable input power level, is suggested in this paper. The power drift is reduced to less than ${\pm}1.16dB$ by AIPLC, which reduces the standard uncertainty of power drift to 0.67%.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.9
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• pp.1167-1176
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• 1995

This paper suggests a method for optimal power assignment of the satellite transponder input carriers in the Multi-level & Multi-bandwidth system. The interference and the noise effects analyzed for the optimal power assignment are intermodulation product caused by the nonlinear transponder characteristics, adjacent channel interference, co-channel interference, and thermal noise in the satellite link. The Fletcher- Powell algorithm is used to determine the optimal input carrier power. The performance criteria for optimal power assignment is classified into 4 categories according to the CNR of destination receiver earth station to meet the requirement for various satellite link environment. We have performed mathematical analysis of objective functions and their derivatives for use in the Fletcher-Powell algorithm, and presented various simulation results based on mathematical analysis. Since the satellite link, it is meaningful to model and analyze these effects in a unified manner and present the method for optimal power assignment of transponder input carriers.

• Journal of Power Electronics
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• v.16 no.3
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• pp.925-935
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• 2016

This paper proposes a new interleaved double-input three-level Boost (DITLB) converter, which is composed of two boost converters indirectly in series. Thus, a high voltage gain, together with a low component stress and a small input current ripple due to the interleaved control scheme, is achieved. The operating principle of the DITLB converter under the individual supplying power (ISP) and simultaneous supplying power (SSP) mode is analyzed. In addition, closed-loop control strategies composed of a voltage-current loop and a voltage-balance loop, have been researched to make the converter operate steadily and to alleviate the neutral-point imbalance issue. Experimental results verify correctness and feasibility of the proposed topology and control strategies.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.12
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• pp.620-625
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• 2004

In this paper, we studied the emissive electric field due to the communication signal and the noise in medium voltage power-line. There are many types of conductive noise in power-line channel, which gives rise to radiation. And if the DMT carrier signal was excited, the current by this term was added to the current by noise and, generate radiation. We calculated input impedance by means of signal input network model of medium voltage power-line channel for calculating these currents. We calculated currents by input impedance and, calculated the emissive electric field by this calculated currents. From the measurement results, we knew that the measured results are very similar to the calculated results and if the input signal power level was higher than -40 dBm, the emissive electric field exceeds FCC radiation limit level 69.5 dB$\mu$V/m.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.993-998
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• 2002

At Power amplifier, distortion of output is appeared because of non-linearlity, so we must study method of compensation for non-linearity. In this paper, it was studied about the characteristic of predistorter using serial schottky diode for an amplifier. As a result, we confirmed that power amplifier was able to linearize when we put predistorter using non-linearity of schottky diode before power amplifier. When input carrier level was low, input carrier was delivered directly into power amplifier but input carrier level was high, input carrier was delivered into power amplifier through predistorter with suppressed level. As a result power amplifier always was at saturation region. Through simulation using serenade 8.0, we have concluded that efficiency was improved about 3%, and predistorter got best linearity at 1.8㎓ between 800㎒∼2.2㎓.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.250-253
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• 2001

This paper is proposed a sinusoidal input voltage Multi-level AC-DC Converter using transformer. In this paper Multi-level PWM Control converter which controls input current by combining buck Converters together to improve input current characteristic, and confirmed its validity throughout simulation and experiment. This method, which is multiplying and duplicating output of converter of equal capacity, is able to control unit power factor of input current, reduce the problem caused by high frequency switching, and apply to high power converter because filter is not necessary.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.215-218
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• 2001

This paper is proposed a sinusoidal input current multi-level ac-dc converter using transformer. The multi-level converter which controls input current by combining Buck converter to Improve input current characteristics. This method, which is multiplying and duplicating output of converter of equal capacity, is able to control unit power factor of input current, reduce the problem caused by high frequency switching, and apply to high power converter because filter is not necessary The feasibility of the circuit is verified by computer simulation using PSIM