• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1442-1447
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• 2004

In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2615-2621
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• 2010

The multi-band six-port phase correlator using metamaterial was designed and fabricated in this paper. The lumped metamaterial structure that can process the dual-band receiving signal was analyzed. Based on the analyzed results, the small-sized metamatrial six-port phase correlator for multi-band direct conversion method was proposed and fabricated. Also, the resistive power divider and $90^{\circ}$ hybrid coupler that comprises the six-port phase correlator were implemented based on the scattering parameters of metamatrial six-port phase correlator. The measured results of the proposed six-port phase correlator show the good agreement with simulation results. The performance of the six-port phase correlator shows the reflection loss below -20 dB in the dual-band. Also, the proposed six-port phase correlator got a good transmission characteristic within 1 dB gain difference and ${\pm}4.1^{\circ}$ phase imbalance, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.861-862
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• 2015

In this paper we present a low area 12-bit SAR ADC (Successive Approximation Register Analog-to-Digital Converter). The proposed circuit is fabricated using Magnachip/SK Hynix 1-Poly 6-Metal $0.18-{\mu}m$ CMOS process, and it is powered by a 1.8-V supply. Total chip area is reduced by replacing the MIM capacitors with MOS capacitors instead of the capacitors consisting of overall part in chip area. The proposed circuit showed improved power dissipation of 1.9mW, and chip area of $0.45mm^2$ as compared to conventional research results at the power supply of 1.8V. The designed circuit also showed high SNDR (Signal-to-Noise Distortion Ratio) of 70.51dB, and excellent effective number of bits of 11.4bits.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.3C
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• pp.296-306
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• 2003

In this paper, algorithm for non-iterative decoding method is proposed and fractal image decoder based on non-iterative fractal decoding algorithm used general purpose digital signal processors is designed and implemented. The algorithm is showed that the attractor image can be obtained analytically whe n the image is encoded using the fractal algorithm proposed by Monro and Dudbridge, in which the corresponding domain block for a range block is fifed. Using the analytical formulas, we can obtain the attractor image without iteration procedure. And we get general formulas of obtained analytical formulas. Computer simulation results for various test images show that we can increase the image decoding speed by more than five times when we use the analytical formulas compared to the previous iteration methods. The fractal image decoder contains two ADSP2181's and perform image decoding by three stage pipeline structure. The performance tests of the implemented decoder is elapsed 31.2ms/frame decoding speed for QCIF data when all the frames are decoded. The results enable us to process the real-time fractal decoding over 30 frames/sec.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.805-814
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• 1994

In this paper, we introduce a new method which is available for analyzing the throughput of the packet radio network by using the auxiliary Markov transient matrix with a failure state and a success state. And we consider the effect of symbol error for the network state(X, R) consisted of the number of transmitting PRU X and receiving PRU R. We examine the packet radio network of a continuous time Markov chain model, and the direct sequence binary phase shift keying CDMA radio channel with hard decision Viterbi decoding and bit-by-bit changing spreading code. For the unslotted distributed multi-hop packet radio network, we assume that the packet error due to a symbol error of radio channel has Poisson process, and the time period of an error occurrence is exponentially distributed. Through the throughputs which are found as a function of radio channel parameters, such as the received signal to noise ratio and chips of spreading code per symbol, and of network parameters, such as the number of PRU and offered traffic rate, it is shown that this composite analysis enables us to combine the Markovian packet radio network model with a coded DS/BPSK CDMA radio channel.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.12 s.354
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• pp.61-67
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• 2006

This paper proposes the algorithm for tracking of the residual phase errors incurred by carrier frequency offset and sampling frequency offset in the orthogonal frequency division multiplexing (OFDM) systems which are suitable for high data rate wireless communications. In the OFDM systems the subcarriers which are orthogonal to each other are modulated by digital data and transmitted simultaneously. The carrier frequency offset causes degradation of signal to noise ratio(SNR) performance and interference between the adjacent subcarriers. The errors in the sampling timing caused by the sampling frequency difference between the transmitter and the receiver sides also cause a major performance degradation in the OFDM systems. The residual error tracking and compensation mechanism is essential in the OFDM system since the carrier and the sampling frequency offset cause the loss of orthogonality resulting in the system performance loss. This paper proposes the scheme where the channel gain and the payload data information are reflected in the residual error tracking process which results in the reduction of the estimation error and the tracking performance improvements under the frequency selective fading wireless channels.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.6
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• pp.29-36
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• 2015

This paper presents an LED backlight driver IC consisting of three linear current regulators and an output-voltage regulation loop with a self-adjustable reference voltage. In the proposed LED driver, the output voltage is controlled by dual feedback loops. The first loop senses and controls the output voltage, and the second loop senses the voltage drop of the linear current regulator and adjusts the reference voltage. With these feedback loops, the voltage drop of the linear current regulator is maintained at a minimum value, at which the driver efficiency is maximized. The output of the driver is a three-channel LED setup with four LEDs in each channel. The luminance is adjusted by the PWM dimming signal. The proposed driver is designed by a $0.35-{\mu}m$ 60-V high-voltage process, resulting in an experimental maximum efficiency of approximately 85%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7C
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• pp.712-722
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• 2002

We have investigated a novel optical decoder for a fiber-optic code division multiple access(CDMA) communication systems. The conventional optical encoder and decoder have the advantage of simple structure. However the number of users in the system is limited by the auto- and cross-correlation properties generated in decoding process. In previous studies, to improve the system performance, although they used an optical code that minimize the sidelobe and cross-correlation, could not yet find a novel methods for performance improvement in fiber-optic CDMA system. Thus, it is necessary to investigate the novel optical decode in order to improve the performance of system. In this paper, we schematize the AND gate logic element(AGLE) composed with 1$\times$2 or 1$\times$3 coupler and the optical thyristor and propose the novel optical decoder using K(weight) AGLE. The optical thyristor only passes the overlapped signal and clips other signals. Such a novel concept means that the optical thyristor can operate as a hard-limiter. We analyze the fiber-optic CDMA system using the novel optical decoder with simulation and is found that the novel optical decoder using the AGLE and optical thyristor excludes the sidelobe and cross-correlation intensity between any two sequences.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.4C
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• pp.254-264
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• 2011

In this paper, we propose two algorithm for improving the performance of wireless localization(Trilateration and Least Square) based on the range based approach method in indoor environment using RSSI for ranging distance. we propose a method to discriminate the case that has relatively large estimation errors in trilateration using Heron''s formula for the volume of a tetrahedron. And we propose the algorithm to process the discriminated types of distance using the absolute value calculated by Heron''s formula. In addition, we propose another algorithm for the case of which the number of anchor nodes larger than three. In this case, Residual Weighting Factor(RWGH) improves the performance of Least Square. However, RWGH requires many number of calculations. In this paper, we propose Iterative Weighted Centroid Algorithm(IWCA) that has better performance and less calculation than RWGH. We show the improvement of performance for two algorithms and the combination of these algorithm by using simulation results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1C
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• pp.81-89
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• 2009

We propose a D-ATR UWB (Differential-Average Transmitted Reference Ultra Wide Band) system based on impulse radio. The TR-UWB systems including traditional TR (Transmitted Reference) and ATR (Average TR), exhibit a problem of reduced data rate, since reference signals are additionally transmitted. To tackle this issue, the transmitter of the proposed D-ATR system employs a differential coding like the conventional D-TR system. In addition, the receiver of the proposed system has the structure that can improve signal-to-noise ratio of the reference template used in the correlation process, by recursively averaging the received reference signals like the conventional ATR system. The simulation results in the IEEE 802.15.4a UWB multipath channel models reveal that the proposed D-ATR system achieves much better bit error rate performance as compared to the conventional D- TR system.