• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.341-344
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• 2002

This paper is proposed a 8-bit analog to digital converter for CMOS image sensor. A analog to digital converter for CMOS image sensor is required function to control gain. Frequency divider is used In control gain in this proposed analog to digital converter. At 3.3 Volt power supply, total static power dissipation is 8㎽ and programmable gain control range is 30㏈. Newly suggested analog to digital converter is designed by 0.35um 2-poly 4-metal CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.54-61
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• 2007

A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.363-369
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• 2004

We propose, for the first time to our knowledge, a novel gain-clamping method for EDFA in WDM add/drop networks by introducing a disturbance observer technique. The control input signal for gain-clamping is composed of a nominal control signal and an additional control signal of compensating the gain fluctuations caused by channel add/drops. Based on disturbance observer technique, we designed the additional control signal such that it has the compensating information of estimated disturbance resulted from channel add/drops. The circuit for generating additional control signal can easily be implemented by using simple electronic devices. We proved the superiority of the new technique over the previous ones by showing simulation results of minimized dips and spikes that appear in power profile of EDFA in the process of channel add/drops.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.349-351
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• 2013

This research paper presents a low-power programmable gain amplifier (PGA) to facilitate signal processing of the detection of defects in steel plates. This circuit is able to adjust a gain in the range of 6 to 60dB in 7 steps using different signal types for various defects from hall sensors. The gain of PGA is designed by operating on-resistors of switches and passive components. The proposed PGA ($0.18{\mu}m$ CMOS process with 1.8 supply voltage) showed excellent gain error of less than -0.2dB, and low power consumption of 0.47mW.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.2
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• pp.10-20
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• 1997

This paper describes the design, the manufacture and the development of th eautomatic gain control unit which ajdusts the gain of IF processor in the high sensitive & multifunctional receiver unit (HMR) for pulse doppler radar system. Accodording to the effective distnce of target, radar cross section, and a lot of external environments (such as clutter), the receiving stage of RADAR system often deviates from dynamic range. To solve this kind o fproblem, continuous/pulse wave AGC are realized, make it possible to control the gain characteristics of receiver stably, and can increase dynamic range linearly by adjusting the gain slope of receiver which is limited by 1-dB gain compression point. In this study, AGC unit is designed to regulate the total gain of receiver by using te analog feedback theory. It also has rapid enough response to process pulse signal. This study presents the gain control method of IF, the real manufacture technique (the package-type components) and the measurement performance of AGC.

• ETRI Journal
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• v.26 no.5
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• pp.501-504
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• 2004

This paper presents a simple gain/phase blind compensation algorithm with an automatic gain control (AGC) function for the adoption of the AGC function and compensation for gain/phase imbalances in quadrature phase shift keying (QPSK) direct conversion receivers (DCRs). The AGC function is interactively operated with the compensation algorithm for gain/phase imbalances. By detecting the gain sum and difference values between the I-channel and Q-channel, the combined AGC and gain imbalance compensation algorithm provides a simpler DCR architecture.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.2
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• pp.93-100
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• 1998

In this paper we analyze the effect of nonlinear gain on laser modulation characteristics applying a small-signal analysis to the rate equation which includes a nonlinear gain term. Also we analyze the resonance frequency and the damping factor which determine laser modulation characteristics, define K factor which is the proportionality factor between resonance frequency and damping factor, and conclude that the decrease in K factor is due to increases in differential gain and no correlation between K factor and nonlinear gain is identified.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.9-16
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• 2013

Long term evolution (LTE) and LTE-Advanced (LTE-A) systems adopt closed-loop multiple-input multiple-output antenna techniques. Equal gain transmission which has equal gain property is the key factor in their codebook design. In this paper, a novel differential codebook structure which maintains the codebook design requirements of LTE or LTE-A systems. Especially, eight-phase shift keying (8-PSK) constellations are used as elements of codewords, which not only maintain equal gain property but also reduce the computation complexity of precoding and decoding function blocks. The equal gain property is very important to uplink because the performance of uplink is very sensitive to the peak-to-average power ratio (PAPR). Moreover, the operation of the proposed differential codebook is explained as a rotation-lock structure. As the results of computer simulations, the steady-state throughput performance of the proposed codebook shows at least 0.9dB of SNR better than those of the conventional LTE codebook with the same amount of feedback information.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1B
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• pp.8-14
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• 2000

This paper analyzes and accesses the gain of optically pumped surface-normal MQW optical amplifiers. The proposed amplifiers have the advantage of polarization independence, high coupling efficiency to and from optical fibers, and flexibility of operating wavelength. We analyzed the gain characteristics of 100 - 200-period MQWs and verified the dependence of a strained lattice and selective doping. Theoretical analysis of such MQWs showsa single-pass gain of 3 dB with broad operation bandwidth. A single-pass gain of 2.6 dB is obtained experimentally in an InGaAs/InGaAlAs MQW amplifier, which is compared with calculations. The use of Fabry-Perot interferometer (FPI) structure in an optical amplifier is a useful way to increase the gain, but causes a problem of narrow operation bandwidth when the single-pass gain is low. Therefore, a single-pass gain above 2to 3 dB is a prerequisite to achieve both a high gain and moderate operation bandwidth in FPI-structured opticalamplifiers. We have designed an FPI-structured surface-normal optical amplifier both with a high gain of broad operation bandwidth of 4.6mm, when a single-pass gain is 3 dB.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.46-52
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• 2014

This paper presents a multiple gain controlled digital phase and frequency detector with a fast lock-time. Lock-time of the digital PLL can be significantly reduced by applying proposed adaptive gain control technique. A loop gain of the proposed digital PLL is controlled by three conditions that are very large phase difference between reference and feedback signal, small phase difference and before lock-state, and after lock-state. The simulation result shows that lock-time of the proposed multiple gain controlled digital PLL is 100 times faster than that of the conventional structure with unit gain mode.