• 전자공학회논문지 IE
• /
• v.48 no.4
• /
• pp.13-18
• /
• 2011

In this paper, we have examined electrical characteristics of LDO regulator according to the process variation using a 1 ${\mu}m$ 20 V high voltage CMOS process. The electrical analysis of LDO regulator have been performed with three kind of SPICE parameter sets (Typ : typical, FF : fast, SS : slow) by process variation which cause change of SPICE parameter such as threshold voltage and effective channel length of MOS devices. From simulation results, we confirmed that in case of SS type SPICE parameter set, the LDO regulator has 3.6 mV/V line regulation, 0.4 mV/mA load regulation and 0.86 ${\mu}s$ output voltage settling time. And in case of Typ type SPICE parameter set, the LDO regulatorhas 4.2 mV/V line regulation, 0.44 mV/mA load regulation and 0.62 ${\mu}s$ output voltage settling time. Finally, in the FF type SPICE parameter set, the LDO regulator has 7.0 mV/V line regulation, 0.56 mV/mA load regulation and 0.27 ${\mu}s$ output voltage settling time.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.18 no.1
• /
• pp.79-84
• /
• 2018

This paper relates with the performance improvement of SE-MMA (Signed Error-Multiple Modulus Algorithm) adaptive equalization algorithm that is used for the reduction of the intersymbol interference due to the distortion which occurs in the communication channel for the transmission of 16-QAM nonconstant modulus signal.. In the conventional MMA, the fixed modulus value that is second order statistics of transmitting signal were used, and the SE-MMA was introduced in order to the simplification of the algorithm's arithmetic operation. The SE-MMA have a fast convergence speed than MMA, but it has a problem of degradation of equalization performance in the steady state due to the arithmetic simplification. In this paper, we propose the new algorithm AV-SE-MMA (Adaptively Varying-SE-MMA) that uses the adaptive varying modulus in order to obtain the error signal for updating the adaptive equalizer coefficient, and its equalization performance were confirmed by simulation. In this paper, the performance of SE-MMA and proposed algorithm were compared, and the equalizer output signal constellation, residual isi, MSE and SER in order to confirm the robustness of noise were used as performace index. As a result of performance comparison, the AV-SE-MMA has better performance in output signal constellation, residual isi and MD compared to the SE-MMA, but it was confirmed that the AV-SE-MMA has similar in the SER performance that means the robustness to the noise.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.18 no.1
• /
• pp.59-69
• /
• 2018

In this paper, we present a robust beamforming design to tackle the weighted sum-rate maximization (WSRM) problem in a multicell multiple-input multiple-output (MIMO) - non-orthogonal multipleaccess (NOMA) downlink system for 5G wireless communications. This work consider the imperfectchannel state information (CSI) at the base station (BS) by adding uncertainties to channel estimation matrices as the worst-case model i.e., singular value uncertainty model (SVUM). With this observation, the WSRM problem is formulated subject to the transmit power constraints at the BS. The objective problem is known as on-deterministic polynomial (NP) problem which is difficult to solve. We propose an robust beam forming design which establishes on majorization minimization (MM) technique to find the optimal transmit beam forming matrix, as well as efficiently solve the objective problem. In addition, we also propose a joint user clustering and power allocation (JUCPA) algorithm in which the best user pair is selected as a cluster to attain a higher sum-rate. Extensive numerical results are provided to show that the proposed robust beamforming design together with the proposed JUCPA algorithm significantly increases the performance in term of sum-rate as compared with the existing NOMA schemes and the conventional orthogonal multiple access (OMA) scheme.

• The KIPS Transactions:PartA
• /
• v.9A no.2
• /
• pp.181-190
• /
• 2002

IEEE1394 is a de facto standard for the home network interfaces of digital multimedia home devices including digital A/V systems, digital camcorders, and PCs. Recently, it has been used in applications to guarantee the real-time characteristics such as home automation system and IICP (Instrument and Industrial Control Protocol). In order to guarantee real-time requirements in these IEEE1394-based real-time applications, this thesis proposes the software architecture of an IEEE1394 based home network that supports the guarantee for service's react-time characteristics. The proposed architecture has a real-time IEEE1394 device driver and event service architecture for guarantee real-time characteristics. The real-time device driver supports priority-based queueing of packets and mechanism to reduce the interrupt latency time in ISR. The event service architecture supports a real-time events delivery based on home network service using real-time event channel. This architecture can accommodate the real-time requirements of various applications and services such as digital multimedia services with QoS guarantees. home automation system required real-tine characteristics.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.47 no.7
• /
• pp.36-44
• /
• 2010

When multi-user MIMO (Multiple-Input Multiple-Output) systems utilize a sum-rate maximization (SRM) scheduler, the throughput of the systems can be enhanced. However, fairness problems may arise because users located near cell edge or experiencing poor channel conditions are less likely to be selected by the SRM scheduler. In this paper, a weighted sum-rate maximization (WSRM) scheduler is used to enhance the fairness performance of the MIMO systems. Closed-form expressions for the optimal transmit power allocation of WSRM and corresponding weighted sum-rate (WSR) are derived in the 6-sector collaborative transmission system. Using the derived results, we propose an algorithm which searches the optimal power allocation for WSRM in the 3-sector collaborative transmission system. Based on the derived closed-form expressions and the proposed algorithm, we perform computer simulations to compare performance of the WSRM scheduler and the SRM scheduler with respect to the sum-rate and the log-sum-of-average rates. We further verify that the WSRM scheduler efficiently improves fairness performance by showing the enhanced performance of average transmission rates in low percentile region.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.11
• /
• pp.8-15
• /
• 2009

Side-channel attacks including the differential power analysis attack are often more powerful than classical cryptanalysis and have to be seriously considered by cryptographic algorithm's implementers. Various countermeasures have been proposed against such attacks. In this paper, we deal with the masking method, which is known to be a very effective countermeasure against the differential power analysis attack and propose new gate-level conversion methods between Boolean and arithmetic masks. The new methods require only 6n-5 XOR and 2n-2 AND gates with 3n-2 gate delay for converting n-bit masks. The basic idea of the proposed methods is that the carry and the sum bits in the ripple adder are manipulated in a way that the adversary cannot detect the relation between these bits and the original raw data. Since the proposed methods use only bitwise operations, they are especially useful for DPA-securely implementing cryptographic algorithms in hardware which use both Boolean and arithmetic operations. For example, we applied them to securely implement the block encryption algorithm SEED in hardware and present its detailed implementation result.

• 전자공학회논문지 IE
• /
• v.47 no.4
• /
• pp.18-27
• /
• 2010

This paper is designed the efficient Data Acquisition System for an vibration of rotatory machines. The Data Acquisition System is consist of the analog logic having signal filer and amplifier, and digital logic with ADC, DSP, FPGA and FIFO memory. The vibration signal of rotatory machines acquired from sensors is controlled by the FPGA device through the analog logic and is saved to FIFO memory being converted analog to digital signal. The digital signal process is performed by the DSP using the vibration data in FIFO memory. The vibration factor of the rotatory machinery analysis and diagnosis is defined the RMS, Peak to Peak, average, GAP, FFT of vibration data and digital filtering by DSP, and is need to follow as being happened the event of vibration and make an application to an warning system. It takes time to process the several analysis step of all vibration data and the event follow, also special event. It should be continuously performed the data acquisition and the process, however during processing the input signal the DSP can not be performed to the acquisited data after then, also it will be lose the data at several channel. Therefore it is that the system uses efficiently the DSP and FPGA devices for reducing the data lose, it design to process a part of the signal data to FPGA from DSP in order to minimize the process time, and a process to parallel process system, as a result of design system it propose to method of faster process and more efficient data acquisition system by using DSP and FPGA than signal DSP system.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.6
• /
• pp.60-67
• /
• 2008

A low-power 2.4GHz fractional-N frequency synthesizer has been designed for 2.4GHz ISM band applications such as Bluetooth, Zigbee, and WLAN. To achieve low-power characteristic, the design has been focused on the power optimization of power-hungry blocks such as VCO, prescaler, and ${\Sigma}-{\Delta}$ modulator. An NP-core type VCO is adopted to optimize both phase noise and power consumption. Dynamic D-F/Fs with no static DC current are employed in designing the low-power prescaler circuit. The ${\Sigma}-{\Delta}$ modulator is designed using a modulus mapping circuit for reducing hardware complexity and power consumption. The designed frequency synthesizer which was fabricated using a $0.18{\mu}m$ CMOS process consumes 7.9mA from a single 1.8V supply voltage. The experimental results show that a phase noise of -118dBc/Hz at 1MHz offset, the reference spur of -70dBc at 25MHz offset, and the channel switching time of $15{\mu}s$ over 25MHz transition have been achieved. The designed chip occupies an area of $1.16mm^2$ including pads where the core area is only $0.64mm^2$.

• Journal of Applied Tourism Food and Beverage Management and Research
• /
• v.8
• /
• pp.123-144
• /
• 1997

This study, by setting the systems of room sale promotion, analyzing the actual status and the present working state with its center on the 'RHotel' that is a special grade-two hotel and the sales promotion activities of each type, intends to understand the presentstatus of the hotel and present its problems and the method for improvement. The strategy of salespromotion and the ineffectivenessof the system organization were found to be imminent in the sales promotion activities as its problems, and the importanceis being not attached to the actual substance rather than to the actualresults, such as the advertisement and publicity strategies, the irrationality of sales personnel controland its evaluation method, and therefore, the goal-oriented control is not being takenad its problems are emerging. Therefore, as an improvement plan, we ought to put the plan of the hotel merchandising into action for customers to buy what they want, the establishment of the customer-oriented sales promotionservice and the communication channel using the brand-new managerial skills, systemaizesales promotion method sand strategies, develop the organizational and systematic strategies develop the organizatinal and systemactic strategies and goods for the sake of the image-making and room sales promotion of hotels, develop the activation ways of flexible operation, and also need to develop the skills of sales promotion. Accordingly, by doing irrationalsales activities in the system and the promotion with its center on the sales promotion department, and it sis urgently required that we streng then the comodity developments fitting the hotel's traits, such as uniformpolicy of cost, mass-communicationactivities for sales promotion, the improvement of non-effectiveness, and advertisement of hotel items, and the publishing of public relation books. Therefore, the best weapon for hotels before other purchaseis to be discriminatized from other competitive hotel with theunderstanding of the psychology and activities of customers, and the communicatin with customers, and to set up organicprograms of sales promotionstrategies. Also we must promote our sales in accordance with the desire of new customers, gater the market information of customers, all the time, and systematize the facility improvement, managerial policy, business strategiescorresponding with the desire of customers. By doing so, we are able to seek, at the same time, both the satis faction of customers and the sales maximization of the hotels that will perfrom the activities of sales promotion and management.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.1
• /
• pp.48-61
• /
• 1989

In this paper, two-dimensional numerical simulation of GaAs MESFFT with 0.7${\mu}m$ gate length is perfomed. Drift-diffusion model which consider that mobility is a function of local electric field, is used. As a discretization method, instead of FDM (finite difference method) and FEM (finite element method), the Control-Volume Formulation (CVF) is used and as a numerical scheme current hybrid scheme or upwind scheme is replaced by power-law scheme which is very approximate to exponential scheme. In the process of numerical analysis, Peclet number which represents the velocity ratio of drift and diffusion, is introduced. And using this concept a current equation which consider numerical scheme at the interface of control volume, is proposed. The I-V characteristics using the model and numerical method has a good agreement with that of previous paper by others. Therefore, it is confined that it may be useful as a simulator for GaAs MESFET. Besides I-V characteristics, the mechanism of both velocity saturation in drift-diffusion model is described from the view of velocity and electric field distribution at the bottom of the channel. In addition, the relationship between the mechanism and position of dipole and drain current, are described.