• Title/Summary/Keyword: InSn solder

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Flip Chip Process on the Local Stiffness-variant Stretchable Substrate for Stretchable Electronic Packages (신축성 전자패키지용 강성도 국부변환 신축기판에서의 플립칩 공정)

  • Park, Donghyeun;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.4
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    • pp.155-161
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    • 2018
  • A Si chip with the Cu/Au bumps of $100-{\mu}m$ diameter was flip-chip bonded using different anisotropic conductive adhesives (ACAs) onto the local stiffness-variant stretchable substrate consisting of polydimethylsiloxane (PDMS) and flexible printed circuit board (FPCB). The average contact resistances of the flip-chip joints processed with ACAs containing different conductive particles were evaluated and compared. The specimen, which was flip-chip bonded using the ACA with Au-coated polymer balls as conductive particles, exhibited a contact resistance of $43.2m{\Omega}$. The contact resistance of the Si chip, which was flip-chip processed with the ACA containing SnBi solder particles, was measured as $36.2m{\Omega}$, On the contrary, an electric open occurred for the sample bonded using the ACA with Ni particles, which was attributed to the formation of flip-chip joints without any entrapped Ni particles because of the least amount of Ni particles in the ACA.

Measurement of Local Elastic Properties of Flip-chip Bump Materials using Contact Resonance Force Microscopy (접촉 공진 힘 현미경 기술을 이용한 플립 칩 범프 재료의 국부 탄성계수 측정)

  • Kim, Dae-Hyun;Ahn, Hyo-Sok;Hahn, Junhee
    • Tribology and Lubricants
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    • v.28 no.4
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    • pp.173-177
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    • 2012
  • We used contact resonance force microscopy (CRFM) technique to determine the quantitative elastic properties of multiple materials integrated on the sub micrometer scale. The CRFM approach measures the frequencies of an AFM cantilever's first two flexural resonances while in contact with a material. The plain strain modulus of an unknown or test material can be obtained by comparing the resonant spectrum of the test material to that of a reference material. In this study we examined the following bumping materials for flip chip by using copper electrode as a reference material: NiP, Solder (Sn-Au-Cu alloy) and under filled epoxy. Data were analyzed by conventional beam dynamics and contact dynamics. The results showed a good agreement (~15% difference) with corresponding values determined by nanoindentaion. These results provide insight into the use of CRFM methods to attain reliable and accurate measurements of elastic properties of materials on the nanoscale.

Practical Application of Lead-free Solder in Electronic Products

  • Cho Il-Je;Chae Kyu-Sang;Min Jae-Sang;Kim Ik-Joo
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2004.09a
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    • pp.93-99
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    • 2004
  • At present, LG Electronics pushes ahead to eliminate the Pb(Lead) -a hazardous material- from all products. Especially, we have performed to select the optimum standard composition of lead free alloy for the application to products for about 3 years from 2000. These days, we have the chance for applying to the mass-production. This project constructed the system for applying the lead free solders on consumer electronic products, which is one of the major products of the LG Electronics. To select the lead free solders with corresponding to the product features, we have passed through the test and applied with Sn-3.0Ag-0.5Cu alloy system to our products, and for the application to the high melting temperature composition, we secured the thermal resistance of the many parts and substrate and optimized the processing conditions. We have operated the temperature cycling test and the high temperature storage test under the standards to confirm the reliability of the products. On these samples, we considered the consequence of our decision by the operating test. For the long life time of the product, we have operated the temperature cycling test at $-45^{\circ}C-+125^{\circ}C$, 1 cycle/hour, 1000 cycles. Also we have tested the tin whisker growth about lead free plating on lead finish. We have analyzed with the SEM, EDS and any other equipment for confirming the failure mode at the joint and the tin whisker growth on lead free finish.

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Cu-SiO2 Hybrid Bonding (Cu-SiO2 하이브리드 본딩)

  • Seo, Hankyeol;Park, Haesung;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.27 no.1
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    • pp.17-24
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    • 2020
  • As an interconnect scaling faces a technical bottleneck, the device stacking technologies have been developed for miniaturization, low cost and high performance. To manufacture a stacked device structure, a vertical interconnect becomes a key process to enable signal and power integrities. Most bonding materials used in stacked structures are currently solder or Cu pillar with Sn cap, but copper is emerging as the most important bonding material due to fine-pitch patternability and high electrical performance. Copper bonding has advantages such as CMOS compatible process, high electrical and thermal conductivities, and excellent mechanical integrity, but it has major disadvantages of high bonding temperature, quick oxidation, and planarization requirement. There are many copper bonding processes such as dielectric bonding, copper direct bonding, copper-oxide hybrid bonding, copper-polymer hybrid bonding, etc.. As copper bonding evolves, copper-oxide hybrid bonding is considered as the most promising bonding process for vertically stacked device structure. This paper reviews current research trends of copper bonding focusing on the key process of Cu-SiO2 hybrid bonding.

Measurement of Joint Resistance of $(Bi,Pb)_2Sr_2Ca_2Cu_3O_x$/Ag Superconducting Tape by Field decay Technique (자장감쇠법을 이용한 $(Bi,Pb)_2Sr_2Ca_2Cu_3O_x$/Ag 초전도선재의 접합저항 측정)

  • Kim, Jung-Ho;Lee, Seung-Muk;Joo, Jin-Ho
    • Progress in Superconductivity
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    • v.14 no.1
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    • pp.1-10
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    • 2012
  • We fabricated a closed coils by using resistive-joint method and the joint resistance of the coils were estimated by field decay technique in liquid nitrogen. We used the Runge-kutta method for the numerical analysis to calculate the decay properties. The closed coil was wound by $(Bi,Pb)_2Sr_2Ca_2Cu_3O_x$/Ag tape. Both ends the tape were overlapped and soldered to each other. The current was induced in a closed coils by external magnetic flux density. Its decay characteristic was observed by means of measuring the magnetic flux density generated by induced current at the center of the closed coil with hall sensor. The joint resistance was calculated as the ratio of the inductance of the loop to the time constants. The joint resistances were evaluated as a function of critical current of loop, contact length, sweep time, and external magnetic flux density in a contact length of 7 cm. It was observed that joint resistance was dependent on contact length of a closed coil, but independent of critical current, sweep time, and external magnetic flux density. The joint resistance was measured to be higher for a standard four-probe method, compared with that for the field decay technique. This implies that noise of measurement in a standard four-probe method is larger than that of field decay technique. It was estimated that joint resistance was $8.0{\times}10^{-9}{\Omega}$ to $11.4{\times}10^{-9}{\Omega}$ for coils of contact length for 7 cm. It was found that 40Pb/60Sn solder are unsuitable for persistent mode.

Fabrication Of Ultraviolet LED Light Source Module Of Current Limiting Diode Circuit By Using Flip Chip Micro Soldering (마이크로솔더링을 이용한 정전류다이오드 회로 자외선 LED 광원모듈 제작)

  • Park, Jong-Min;Yu, Soon Jae;Kawan, Anil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.4
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    • pp.237-240
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    • 2016
  • The improvement of irradiation intensity and irradiation uniformity is essential for large area and high power UVA light source application. In this study, large number of chips bonded by micro soldering technique were driven by low current, and current limiting diodes were configured to supply constant current to parallel circuits consisting of large number of series strings. The dimension of light source module circuit board was $350{\times}90mm^2$ and 16,650 numbers of 385 nm flip chip LEDs were used with a configuration of 90 parallel and 185 series strings. The space between LEDs in parallel and series strings were maintained at 1.9 mm and 1.0 mm distance, respectively. The size of the flip chip was $750{\times}750{\mu}m^2$ were used with contact pads of $260{\times}669{\mu}m^2$ size, and SAC (96.5 Sn/3.0 Ag/0.5 Cu) solder was used for flip chip bonding. The fabricated light source module with 7.5 m A supply current showed temperature rise of $66^{\circ}C$, whereas irradiation was measured to be $300mW/cm^2$. Inaddition, 0.23% variation of the constant current in each series string was demonstrated.

Properties of Ag Thick Films Fabricated by Using Low Temperature Curable Ag Pastes (저온 경화형 Ag 페이스트 및 이를 이용한 Ag 후막의 제조 및 특성)

  • Park, Joon-Shik;Hwang, Joon-Ho;Kim, Jin-Gu;Kim, Yong-Han;Park, Hyo-Derk;Kang, Sung-Goon
    • Korean Journal of Materials Research
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    • v.13 no.1
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    • pp.18-23
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    • 2003
  • Properties of Ag thick films fabricated by using low temperature curable silver pastes were investigated. Ag pastes were consisted of polymer resins and silver powders. Ag pastes were used for conductive or fixing materials between board and various electrical and electronic devices. Low temperature curable Ag pastes have some advantages over high temperature curable types. In cases of chip mounting, soldering properties were required for screen printed Ag thick films. In this study, four types of Ag pastes were fabricated with different compositions. Screen printed Ag thick films on alumina substrates were fabricated at various curing temperatures and times. Thickness, resistivity, adhesive strength and solderability of fabricated Ag thick films were characterized. Finally, Ag thick films produced using Ag pastes, sample A and B, cured at $150^{\circ}C$ for longer than 6 h and $180^{\circ}C$ for longer than 2 h, and $150^{\circ}C$ for longer than 1 h and $180^{\circ}C$ for 1 h, respectively, showed low resistivities of $10^{-4}$ $∼10^{-5}$ Ωcm and good adhesive strength of 1∼5 Mpa. Soldering properties of those Ag thick films with curing temperatures at solder of 62Sn/36Pb/3Ag were also investigated.

Thermal Fatigue Failure of Solder Joints in Electronic Systems (미세솔더접속부의 열피로파단)

  • 박화순
    • Journal of Welding and Joining
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    • v.13 no.4
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    • pp.7-13
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    • 1995
  • 마이크로솔더링에 의한 전자기기는, 사회기능의 중추가 되는 컴퓨터, 통신 기기, 항공기 인공위성 등의 제어계를 구성하므로, 그 접속부에 대한 높은 신뢰성의 요구는 그 무엇보다 중요하다. 전자기기에 있어서의 솔더 접속부는 집과 기판의 전기 적.기계적 접속의 역할을 하고 있으며, 따라서 개개의 접속부의 파단은 전체의 불량 으로 연결된다. 실제 전자콤포넌트와 그 시스템의 단선 등의 사고에 있어서 자주 발생 하는 사고중의 하나가 솔더접속부의 단선에 의한 것이며, 그 단선중에서도 가장 보편 적이며 또한 대단히 심각한 문제로서 주목을 받고 있는 것이 솔더접속부의 열피로파단 이다. 전자기기를 사용할 때, 스위치의 on-off에 의한 power cycle과 환경의 온도변화 에 기인하는 반복열 사이클은 솔더접속부의 피로를 일으키게 되고, 결국에는 사용중에 파단을 초래하게 된다. 이러한 온도변화의 범위는 약 -55.deg. - 150.deg.C로 예상할 수 있으며, 여기서 최고온도인 150.deg.C는 Pb-Sn 공정합금의 경우 0.9Tm.p.이상의 고온에 해당한다. 이 피로는 등온적으로 또는 열사이클중에 발생하기도 한다. 솔더접 속부의 열피로수명은 대부분의 공업재료에서 나타나는 저사이클피로거동과 유사하게 발생하며, 솔더 접속부에 인가되는 열변형/응력(thermal strain/stress)의 크기에 크게 의존하는 것으로 알려져 있다. 솔더는 서로 다른 열팽창계수를 갖는 칩과 회로 기관의 두종류의 재료를 접속하기 때문에, 상기한 바와 같은 반복열사이클에 의하여 발생하는 열변형/응력이 접속부의 피로.파단을 야기시킨다. 이러한 솔더접속부에 대한 주기적인 응력/변형의 인가는 접속부에 내.외적으로 현저한 변화를 야기시키게 되고, 열피로로 연결되며 결국에는 시스템의 전기적 단선을 초래하게 된다. 또한 열피로파단 현상는 변형/응력의 크기 뿐 만아니라 솔더합금자체의 야금학적인 물성에도 크게 의존 하며, 내적.외적인 열변화에 의한 야금학적인 특성변화도 크게 영향을 미친다. 솔더 접속부의 신뢰성에 대한 연구는, 그 중요성에 비추어 볼 때, 지금까지 수많은 연구가 행하여져 왔다. 그러나 신뢰성과 관련된 열피로파단현상에 대한 야금학적인 면에서의 연구는 비교적 적은 편이다. 따라서 본 해설에서는 전자기기의 마이크로 솔더접속부 에서 발생하는 열피로파단현상에 대한 야금학적인 면에 중점을 두어 서술하고자 한다.

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