• Biomolecules & Therapeutics
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• 제20권2호
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• pp.207-213
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• 2012

The present study examined the effects of krill-derived phosphatidylserine (Krill-PS) on the learning and memory function and the neural activity in rats with trimethyltin (TMT)-induced memory deficits. The rats were administered vehicle (medium-chain triglyceride: MCT) or Krill-PS (50, 100 mg/kg, p.o.) daily for 21 days. The cognitive improving efficacy of Krill-PS in TMT-induced amnesic rats was investigated by assessing the Morris water maze test and by performing choline acetyltransferase (ChAT), acetylcholinesterase (AChE) and cAMP responsive element binding protein (CREB) immunohistochemistry. The rats with TMT injection showed impaired learning and memory of the tasks and treatment with Krill-PS produced a significant improvement of the escape latency to find the platform in the Morris water maze at the $2^{nd}$ and $4^{th}$ day compared to that of the MCT group (p<0.05). In the retention test, the Krill-PS+MCT groups showed increased time spent around the platform compared to that of the MCT group. Consistent with the behavioral data, Krill-PS 50+MCT group significantly alleviated the loss of acetylcholinergic neurons in the hippocampus and medial septum compared to that of the MCT group. Treatment with Krill-PS significantly increased the CREB positive neurons in the hippocampal CA1 area as compared to that of the MCT group. These results suggest that Krill-PS may be useful for improving the cognitive function via regulation of cholinergic marker enzyme activity and neural activity.

• 사물인터넷융복합논문지
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• 제8권4호
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• pp.9-15
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• 2022

낸드 플래시 메모리는 저전력 소비와 빠른 데이터 처리 속도 때문에 다양한 저장 장치의 미디어로 사용되고 있다. 그러나 데이터의 읽기 처리 속도가 쓰기 처리 속도와 비교하여 약 10배 빠른 비대칭 속도의 특징이 있기 때문에 속도차이를 개선하기 위한 다양한 연구가 진행되고 있다. 특히 플래시 전용 버퍼 관리 정책은 대부분 쓰기 속도를 개선하기 위해 연구되어 왔다. 그러나 최근에 다양한 목적으로 사용되고 있는 플래시 메모리로 구성된 SSD(solid state disk)는 쓰기 성능보다 읽기 성능에 취약한 문제가 있다. 본 논문에서는 낸드 플래시 메모리로 구성된 SSD에서 쓰기 성능보다 읽기 성능이 더 좋지 않은 이유를 밝히고 이를 개선하기 위한 버퍼 관리 정책을 연구한다. 본 논문에서 제안하는 버퍼 관리 정책은 읽기 데이터의 패턴을 분석하고 미래에 요청될 데이터를 낸드 플래시 메모리에서 미리 읽어두는 정책을 적용하여 플래시 기반 저장 장치의 속도를 개선하는 방법을 제안한다. 또한, 시뮬레이션을 통해 미리 읽기 정책의 효과를 증명한다.

• 대한간호학회지
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• 제30권5호
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• pp.1170-1180
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• 2000

This study was a quasi-experimental study to confirm the effects of a memory training program using efficacy sources. The purpose was to develop an effective memory training program for elderly people and to identify the effects of the memory training program. This study was carried out between February 24 and July 18, 1999 and the subjects of the study were 102 elderly people who were participants at a welfare institute in Seoul. The experimental group (51) and the control group (51) were assigned by means of participation order. The control group was matched to the experimental group and was selected considering age, sex, and religion. The experimental group participated in the memory training program. The memory training program was based on the literature of Fogler & Stern (1994), Wang & Lee (1990), Lee (1991) and Lee (1993). The memory training program was given twice a week for two weeks with each program lasting two hours. Task centered memory self-efficacy was measured using the Memory Self-Efficacy Scale developed by Berry & Dennehey (1989) and Meta Memory was measured by the MIA developed by Dixon et al. (1988) Memory performance was measured by the word list developed by Cho Sung Won (1995) and the face recognition task (Face Recognition Task developed for this study). Data were analyzed by SPSS PC and the results are described below. 1. The experimental group which participated in the Memory Training Program showed higher task centered memory self-efficacy scores as compared to the control group (t=4.354, P=.0001). 2. The experimental group which participated in the Memory Training Program showed higher metamemory scores as compared to the control group (t=4.733, P=.0001). 3. The experimental group which participated in the Memory Training Program showed higher memory performance scores as compared to the control group (t=7.500, P=.0001). The memory performance involved an immediate word recall task, a delayed word recall task, a word recognition task, and the face recognition task. 4. In the experimental group, there was significant correlation between the task centered memory self-efficacy scores and the metamemory scores (r=.382, P=.006), but the correlation between the task centered memory self-efficacy scores and the memory performance scores and between the metamemory scores and the memory performance scores were not significant. The results showed that task centered memory self-efficacy, meta memory and memory performance improved following the Memory Training Program including the memory process, changes in memory with aging, and appropriate use of memory strategies. Memory Training Program is an effective nursing intervention for improving memory in elderly people and, also, in people with complaints of memory loss.

• 한국컴퓨터정보학회:학술대회논문집
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• 한국컴퓨터정보학회 2023년도 제67차 동계학술대회논문집 31권1호
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• pp.53-54
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• 2023

본 논문에서는 키넥트 센서 기반의 아동 기억력 향상 애플리케이션을 설계하고 구현한다. 이 애플리케이션은 유아층의 기억력을 향상시키고 팔 동작으로 소근육 발달에 도움을 주는 카드 짝 맞추기 게임의 기능을 구현한다. 카드 짝 맞추기 게임은 키넥트 센서에서 인식한 사용자의 스켈레톤, 뎁스스트림, 조인트, 음성 정보를 활용하여 플레이어의 오른손을 인식하여 카드를 뒤집고 짝이 맞는 경우는 그대로 두고 짝이 맞지 않는 경우에는 다시 뒤집는다. 사용자는 카드의 위치와 그림을 기억하며 16장의 카드를 모두 맞출때까지 계속 진행한다. 이 게임은 유아들이 재미있게 게임을 즐기면서 기억력을 향상시킬 수 있다.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2007년도 춘계학술대회A
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• pp.957-962
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• 2007

This paper describes a new mechanism for improving the force of actuators based on shape memory alloys (SMA) by increasing the number at which a coil pattern SMA spring can evenly be heated. This structure accomplishes a high efficient transformation between force and displacement overcoming the main mechanical drawback of shape memory alloys, that being the limit strain. A pantograph manipulator actuated by the introduced new mechanism has been designed for this research. Mechanical structure and driving mechanism of this manipulator are described in detail, and its control algorithm and current amplifier circuit in a position control system are designed.

• 한국분말재료학회지
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• 제2권3호
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• pp.208-215
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• 1995

The aging effects on the characteristics of the melt spun Cu based shape memory alloys have been investigated by the microhardness test, X-ray diffraction, differential scanning calorimetry, scanning electron microscopy and transmission electron microscopy. After aged for specific times, hardness of the ribbons began to increase and shape memory capacity diminished. At the initial stage of aging the austenitic transformation temperatures increased gradually, but at last became nearly constant: That is, the aging deteriorated the thermal stability. The increase in hardness was due to the formation of the $\gamma_2$ precipitates. The loss in the shape memory capacity was due to the decrement of solute atoms in the matrix by the formation of the $\gamma_2$ precipitates. In this study, it was confirmed that Mn is an effective element for Improving the thermal stability.

• 한국분말야금학회:학술대회논문집
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• 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part2
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• pp.846-847
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• 2006

The composite used in this paper was prepared by hot-pressing ball-milled Mg alloy powders, in which NiTi shape memory alloy fibers in a row were sandwiched. The microstructure and property were examined. It is shown that the composite consisted of a homogenous matrix with uniformly distributed NiTi shape memory alloy fibers, recrystallization took place in the Mg alloy matrix which was subjected to plastic deformation an adequate bonding formed between the matrix and fibers; the density and tensile strength of the composite increased after the hot-forging; the hot-forging process is capable of improving properties of the composite.

• 전기학회논문지
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• 제68권2호
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• pp.364-369
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• 2019

Generally, since memory chips should be tested all, considering its volume, the reduction in test time for detecting faults plays an important role in reducing the overall production cost. The parallel testing of chips in one ATE is a competitive solution to solve it. In this paper, NOC is proposed as test interface architecture between DUTs and ATE. Because NOC can be extended freely, there is no limit on the number of DUTs tested at the same time. Thus, more memory can be tested with the same bandwidth of ATE. Furthermore, the proposed NOC-based parallel test method can increase the efficiency of channel usage by packet type data transmission.

• 반도체디스플레이기술학회지
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• 제22권1호
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• pp.43-48
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• 2023

This paper discusses the design of 32Mbyte asynchronous nonvolatile memory modules, which includes self-diagnosis and RTC (Real Time Clock) functions to enhance their data stability and reliability. Nonvolatile memory modules can maintain data even in a power-off state, thereby improving the stability and reliability of a system or device. However, due to the possibility of data error due to electrical or physical reasons, additional data loss prevention methods are required. To minimize data error in asynchronous nonvolatile memory modules, this paper proposes the use of voltage monitoring circuits, self-diagnosis, BBT (Bad Block Table), ECC (Error Correction Code), CRC (Cyclic Redundancy Check)32, and data check sum, data recording method using RTC. Prototypes have been produced to confirm correct operation and suggest the possibility of commercialization.

• International journal of advanced smart convergence
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• 제6권1호
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• pp.26-31
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• 2017

When mobile navigator device accesses data randomly, the cache memory performance is rapidly deteriorated due to low memory access locality. For instance, GPS (General Positioning System) of navigator program for automobiles or drones, that are currently in common use, uses data from 32 satellites and computes current position of a receiver. This computation of positioning is the major part of GPS which accounts more than 50% computation in the program. In this computation task, the satellite signals are received in real time and stored in buffer memories. At this task, since necessary data cannot be sequentially stored, the data is read and used at random. This data accessing patterns are generated randomly, thus, memory system performance is worse by low data locality. As a result, it is difficult to process data in real time due to low data localization. Improving the low memory access locality inherited on the algorithms of conventional communication applications requires a certain optimization technique to solve this problem. In this study, we try to do optimizations with data and memory to improve the locality problem. In experiment, we show that our case study can improve processing speed of core computation and improve our overall system performance by 14%.