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A Case Study of a Navigator Optimization Process

  • Cho, Doosan (Electrical & Electronic Engineering, Sunchon National University)
  • Received : 2017.02.15
  • Accepted : 2017.03.06
  • Published : 2017.03.31

Abstract

When mobile navigator device accesses data randomly, the cache memory performance is rapidly deteriorated due to low memory access locality. For instance, GPS (General Positioning System) of navigator program for automobiles or drones, that are currently in common use, uses data from 32 satellites and computes current position of a receiver. This computation of positioning is the major part of GPS which accounts more than 50% computation in the program. In this computation task, the satellite signals are received in real time and stored in buffer memories. At this task, since necessary data cannot be sequentially stored, the data is read and used at random. This data accessing patterns are generated randomly, thus, memory system performance is worse by low data locality. As a result, it is difficult to process data in real time due to low data localization. Improving the low memory access locality inherited on the algorithms of conventional communication applications requires a certain optimization technique to solve this problem. In this study, we try to do optimizations with data and memory to improve the locality problem. In experiment, we show that our case study can improve processing speed of core computation and improve our overall system performance by 14%.

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References

  1. Wm. A. Wulf and Sally A. McKee, "Hitting the Memory Wall: Implications of the Obvious," ACM SIGARCH Computer Architecture News, vol.23, no.1, pp.20-24, Mar. 1995. https://doi.org/10.1145/216585.216588
  2. John L. Hennessy and David A. Patterson, "COMPUTER ARCHITECTURE A Quantiative Approach," 5th edition, Morgan Kaufmann, pp.72-78, Sep. 2011.
  3. ARM920T Technical Reference Manual, 1 edition, 2001. [online] http://www.atmel.com/Images/ARM_920T_TRM.pdf
  4. K. Hazelwood, and A. Klauser, "A dynamic binary instrumentation engine for the ARM architecture," Compilers, Architecture and Synthesis for Embedded Systems Conference, Oct. 2006.
  5. Jun Yang, Rajiv Gupta, "Frequent value locality and its applications," ACM TECS, 2002.
  6. Carr, S., McKinley, K. S., & Tseng, C. W., "Compiler Optimizations for Improving Data Locality," ACM SIGPLAN Notices, 29(11), 252-262, 1994. https://doi.org/10.1145/195470.195557
  7. Kathryn S. Mckinley, Steve Carr, Chau Wen Tseng, "Improving Data Locality with Loop Transformations," ACM Transactions on Programming Languages and Systems 18(4), 424-453, 1996. https://doi.org/10.1145/233561.233564