• 제목/요약/키워드: Implementation Performance

검색결과 6,363건 처리시간 0.038초

연결 숫자음 인식 시스템의 구현과 성능 변화 (A Study on the Implementation of Connected-Digit Recognition System and Changes of its Performance)

  • 윤영선;박윤상;채의근
    • 대한음성학회지:말소리
    • /
    • 제45호
    • /
    • pp.47-61
    • /
    • 2003
  • In this paper, we consider the implementation of connected digit recognition system and the several approaches to improve its performance. To implement efficiently the fixed or variable length digit recognition system, finite state network (FSN) is required. We merge the word network algorithm that implements the FSN with one pass dynamic programming search algorithm that is used for general speech recognition system for fast search. To find the efficient modeling of digit recognition system, we perform some experiments along the various conditions to affect the performance and summarize the results.

  • PDF

한국 서비스산업의 6시그마 기법 시행과 그 성과에 관한 실증적 연구 (An Empirical Study on Performance of Six Sigma Tools in Korean Service Industry)

  • 장대성;양종곤;황인천
    • 품질경영학회지
    • /
    • 제32권1호
    • /
    • pp.1-20
    • /
    • 2004
  • Six sigma has been the most influential management innovation program since 1996 in Korea. As a result of successful implementation of 6 sigma, there have been a number of dramatic quality improvement cases. However, no empirical study of 6 sigma implementation study has done especially in the service industry of Korea. This article reviews status of finance companies which implemented 6 sigma programs in Korea and then demonstrates the relationship between 6 sigma problem solving tools such as analysis of variance and graph techniques, etc and project success and operational performance. Customer survey tools, process analysis, and documentation tool are identified as influential tools on project success. Tools of measure steps, customer survey tools, and documentation tool are found as influential tools on operational performance.

다중 컴퓨터 망에서 신경회로망 설계를 위한 고속병렬처리 시스템의 구현 (An Implementation of High-Speed Parallel Processing System for Neural Network Design by Using the Multicomputer Network)

  • 김진호;최흥문
    • 전자공학회논문지B
    • /
    • 제30B권5호
    • /
    • pp.120-128
    • /
    • 1993
  • In this paper, an implementation of high-speed parallel processing system for neural network design on the multicomputer network is presented. Linear speedup expandability is increased by reducing the synchronization penalty and the communication overhead. Also, we presented the parallel processing models and their performance evaluation models for each of the parallization methods of the neural network. The results of the experiments for the character recognition of the neural network bases on the proposed system show that the proposed approach has the higher linear speedup expandability than the other systems. The proposed parallel processing models and the performance evaluation models could be used effectively for the design and the performance estimation of the neural network on the multicomputer network.

  • PDF

국방연구개발 프로젝트의 기술적 성과 측정.분석 프로세스 구현방안과 도구 개발 (Technical Performance Measurement & Aanaysis Process Implementation Method and Tool Development of The Defense R&D Project)

  • 유이주;박영원
    • 한국군사과학기술학회지
    • /
    • 제11권3호
    • /
    • pp.76-88
    • /
    • 2008
  • The purpose of the research is to propose an earned-value indicator for technical performance measurements of an ongoing defense R&D project and the associated measurement, analysis and the implementation process for data collection and usages. Furthermore, the study demonstrates the evidences of benefits and validity of the proposed approach through the enabling tool development and its application examples.

Low Cost, High Performance, and Effective Overdrive Implementation Method for LCD Systems

  • Cho, Young-Min;Park, Chan-Soo;Bhowmik, Achintya;Lee, Seung-Woo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
    • /
    • pp.1168-1171
    • /
    • 2009
  • We propose a low cost, high performance, effective overdrive implementation method for liquid crystal display systems. The technique can calculate all overdrive values using higher order approximation algorithm by only three measurements. We find that our technique can be applied regardless of LCD panels. Due to its simplicity, we can also tune motion performance of the LCD systems without measurements.

  • PDF

상용차용 ABS ECU의 성능분석을 위한 HILS 시스템 구축 (Implementation of HILS System for Performance Test of the ABS ECU for Commercial Vehicles)

  • 조정목;황돈하;박도영;김용주;조중선;박성경
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2000년도 하계학술대회 논문집 D
    • /
    • pp.2564-2566
    • /
    • 2000
  • HILS(Hardware In-the-Loop Simulation) is an effective tool for design, performance evaluation and test of developed vehicle subsystems such as ABS(Antilock Brake System), suspension, and steering systems. This paper describes a HILS model for an ABS/ASR application. Also the implementation of HILS system for performance test of the ABS ECU(Electronic Control Unit) for commercial vehicles is presented.

  • PDF

ATM 기반의 HDSL 정합기능 구현 및 성능평가 (Implementation and performance assessment of high-rate digital subscriber lind(HDSL) interface function under ATM)

  • 양충렬;장재득;김진태;강석열;김환우
    • 한국통신학회논문지
    • /
    • 제22권5호
    • /
    • pp.990-1006
    • /
    • 1997
  • This paper describes an interface function and its performance assessment for high-bit-rate digital subscriber line (HDSL) under ATM. The interface of HDSL function of ATM system was achieved by HDSL subscriber physical layer board assembly(HSPA) which was modeled as design standard for ATM. We have presented a new worst case of subscriber line conditions from existing results of investigations on impairments such as crosstalk, impulse noise, longitudinal, power line noise and others. We have measured the maximum service loop length available by HDSL, and found that HSPA, at a 2.048Mbps data transmission, is possible within a carrier serving area(CSA) under the worst case loop noise conditions at an error rate or 10$^{-7}$ on a two coordinated unshielded twisted pairs in the presense of impairments. We conclude tht, in terms of a performance-per-lin simulator, the HSPA is an excellent candidate for HDSL implementation under ATM.

  • PDF

The Implementation of Group Delay Equalizer and Its Performance Evaluation for Point-to-Point Digital Radio Relay System

  • Suh, Kyoung-Whoan
    • 한국전자파학회논문지
    • /
    • 제11권8호
    • /
    • pp.1444-1454
    • /
    • 2000
  • The implementation of IF group delay equalizer and its performance are presented for radio relay system applications, and measured results are in good agreement with the simulated ones based upon analytical formulations. For waveguide filter of 40㎒ channel spacing, equalized delay accuracy of about +/- 2.0nsec can be obtained only by constructing 4 stage delay circuits, which provides good performance in system BER curves compared with no filter case, and the difference is less than 1.0㏈ at $10^{-12}$ BER. So this scheme with simple hardware design can be used for correcting the distorted group delays mainly caused by wavegiude filters. To evaluate the designed group delay equalizer, various simulated and experimental results are shown here in conjunction with STM-1 signal of co-channel 64-QAM digital radio relay system.

  • PDF

Review on RF Performance of Ultra Wide Band Device

  • 이일규;강법주
    • 조명전기설비학회논문지
    • /
    • 제21권2호
    • /
    • pp.34-39
    • /
    • 2007
  • UWB(Ultra Wide Band) system for high speed and high accurate location has been studying actively. This paper presents the design and implementation of RF transceiver for DS-CDMA(Direct Sequence-Code Division Multiple Access) UWB device. Major components of RF transceiver such as Low Noise Amplifier(LNA) and Band Pass Filter(BPF) are designed and then fabricated to meet wideband characteristics. The RF transceiver was implemented by the use of the fabricated components and commercial devices after carrying out performance simulation. Through the performance evaluation of the UWB RF transceiver with W-CDMA signal, the approach of design, implementation and evaluation of RF transceiver which is available to DS-CDMA UWB system is verified.

Delay Performance of Multi-Service Network with Strict Priority Scheduling Scheme

  • Lee, Hoon
    • 한국통신학회논문지
    • /
    • 제30권2B호
    • /
    • pp.11-20
    • /
    • 2005
  • Strict priority scheduling scheme is a good candidate for the implementation of service differentiation in an Internet because of simplicity in implementation and the capability to guarantee the delay requirement of the highest class of traffic. However, it is also blown that strict priority starves the lower-class traffic at the cost of prioritizing the higher-class traffic. The purpose of this work is to propose an analytic method which can estimate the average delay performance of Diffserv service architecture and shows that strict priority scheme does not sacrifice the lower class traffic over a diverse condition of the load. From the numerical experiments for three-class Diffserv network we validate our argument that strict priority scheme may be applied to a service differentiation scheme for the future Internet.