• 제목/요약/키워드: Impedance-source network

검색결과 48건 처리시간 0.036초

Method for Adjusting Single Matching Network for High-Power Transfer Efficiency of Wireless Power Transfer System

  • Seo, Dong-Wook;Lee, Jae-Ho;Lee, Hyungsoo
    • ETRI Journal
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    • 제38권5호
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    • pp.962-971
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    • 2016
  • A wireless power transfer (WPT) system is generally designed with the optimum source and load impedance in order to achieve the maximum power transfer efficiency (PTE) at a specific coupling coefficient. Empirically or intuitively, however, it is well known that a high PTE can be attained by adjusting either the source or load impedance. In this paper, we estimate the maximum achievable PTE of WPT systems with the given load impedance, and propose the condition of source impedance for the maximum PTE. This condition can be reciprocally applied to the load impedance of a WPT system with the given source impedance. First, we review the transducer power gain of a two-port network as the PTE of the WPT system. Next, we derive two candidate conditions, the critical coupling and the optimum conditions, from the transducer power gain. Finally, we compare the two conditions carefully, and the results therefore indicate that the optimum condition is more suitable for a highly efficient WPT system with a given load impedance.

Neutral-point Potential Balancing Method for Switched-Inductor Z-Source Three-level Inverter

  • Wang, Xiaogang;Zhang, Jie
    • Journal of Electrical Engineering and Technology
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    • 제12권3호
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    • pp.1203-1210
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    • 2017
  • Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

축전 용량이 고려된 평판형 유도 결합 플라즈마 원의 등가회로 모델 (An equivalent Circuit Model of Transformer Coupled Plasma Source)

  • 김정미;권득철;윤남식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 C
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    • pp.1760-1762
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    • 2002
  • In this work we develop an equivalent circuit model of TCP(transformer coupled plasma) source and investigate matching characteristic. The developed circuit model includes transmission line, standard-type impedance matching network and displacement current in the plasma source. The impedance of TCP is calculated by previously developed program for various source parameters and dependance of components of matching impedance on the value of source impedance is investigated.

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Modified Capacitor-Assisted Z-Source Inverter Topology with Enhanced Boost Ability

  • Ho, Anh-Vu;Chun, Tae-Won
    • Journal of Power Electronics
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    • 제17권5호
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    • pp.1195-1202
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    • 2017
  • This paper presents a novel topology named a modified capacitor-assisted Z-source inverter (MCA-ZSI) based on the traditional ZSI. The impedance network of the proposed MCA-ZSI consists of two symmetrical cells coupled with two capacitors with an X-shape structure, and each cell has two inductors, two capacitors, and one diode. Compared with other topologies based on switched ZSI with the same number of components used at impedance network, the proposed topology provides higher boost ability, lower voltage stress across inverter switching devices, and lower capacitor voltage stress. The improved performances of the proposed topology are demonstrated in the simulation and experimental results.

Quasi Z-소스 인버터의 임피던스 네트워크 설계방법 (Method for Designing Impedance Network at Quasi Z-Source Inverter)

  • 양종호;전태원;이홍희;김흥근;노의철
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2011년도 추계학술대회
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    • pp.223-224
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    • 2011
  • This paper presents the method to design the inductor and capacitor value considering the ripple component that may be generated by three operating states of the Quasi Z source inverter at the impedance network. Based on the analysis of each operation mode, the equations of the capacitor voltage and inductor current are derived. In order to simplify the design processing, design equations of the impedance network are derived where the capacitor voltage and inductor current are lineared. The validity of the design method is verified with the simulation result using PSIM.

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Quasi Z-소스 인버터의 임피던스 네트워크 파라미터 설계방법 (Method for Designing Parameters of Impedance Network at Quasi Z-Source Inverter)

  • 양종호;전태원;이홍희;김흥근;노의철
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 전력전자학술대회 논문집
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    • pp.203-204
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    • 2012
  • This paper presents the method to design the inductor and capacitor value considering the ripple component that may be generated by three operating states of the Quasi Z-source inverter at the impedance network. Based on the analysis of each operation mode, the equations of the capacitor voltage and inductor current are derived. In order to simplify the design processing, design equations of the impedance network are derived where the capacitor voltage and inductor current are lineared. The validity of the design method is verified with the simulation result using PSIM and experimental result using 32-bit DSP.

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커패시터의 ESR을 고려한 Quasi Z-소스 인버터의 임피던스 네트워크 설계 (Designing Impedance Network at Quasi Z-Source Inverters by Considering ESR in the Capacitor)

  • 양종호;전태원;이홍희;김흥근;노의철
    • 전력전자학회논문지
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    • 제17권5호
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    • pp.453-460
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    • 2012
  • This paper proposes the method to design the parameters of an impedance network at three-phase QZSI(quasi Z-source inverter) by considering an equivalent series resistance (ESR) in the capacitor. The equations of both two capacitor voltages and two inductor currents are derived at three operating modes of the QZSI. The capacitor voltage ripples caused by the ESR in the capacitor at the transition state of operating modes are calculated. Based on the ripples of both the capacitor voltages and inductor currents, the optimal values of capacitor and inductor are designed. The simulation studies using PSIM and experimental results with DSP are carried out to verify the performance of design method.

Impedance Matching Characteristic Research Utilizing L-type Matching Network

  • Jun Gyu Ha;Bo Keun Kim;Dae Sik Junn
    • 반도체디스플레이기술학회지
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    • 제22권2호
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    • pp.64-71
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    • 2023
  • If an impedance mismatch occurs between the source and load in a Radio Frequency transmission system, reflected power is generated. This results in incomplete power transmission and the generation of Reflected Power, which returns to the Radio Frequency generator. To minimize this Reflected Power, Impedance matching is performed. Fast and efficient Impedance matching, along with converging reflected power towards zero, is advantageous for achieving desired plasma characteristics in semiconductor processes. This paper explores Impedance matching by adjusting the Vacuum Variable Capacitor of an L-type Matching Module based on the trends observed in the voltage of the Phase Sensor and Electromotive Force voltage. After assessing the impedance matching characteristics, the findings are described.

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스펙트럼 분석기를 이용한 2가지 잡음 파라미터 측정방법과 비교 (Two Noise Parameter Measurement Methods Using Spectrum Analyzer and Comparison)

  • 이동현;염경환
    • 한국전자파학회논문지
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    • 제26권12호
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    • pp.1072-1082
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    • 2015
  • 본 논문에서는 스펙트럼 분석기를 이용하여 잡음 파라미터를 측정하는 2가지 방법을 제안하였다. 제안된 첫 번째 방법은 6-포트 회로망을 이용하여 잡음상관행렬을 측정하고, 이를 통해 잡음파라미터를 결정하는 방법이다. 그리고 제안된 두 번째 방법은 전원 임피던스의 변화에 따른 DUT의 잡음지수를 직접 측정하고, 이를 통해 잡음파라미터를 추출하는 방법이다. 전원 임피던스의 변화에 따른 잡음지수를 측정을 위해 스펙트럼 분석기를 이용, 임의의 전원 임피던스를 갖는 DUT의 잡음지수를 측정하는 방법과 전원 임피던스의 변화를 위해 사용한 임피던스 튜너가 DUT에 주는 잡음영향을 제거하는 방법을 보였다. 제안된 2가지의 방법으로 수동 및 능동 DUT에 대한 잡음파라미터를 측정하였고, 이를 비교하였다. 비교 결과, 2가지 방법에 대한 잡음 파라미터 결과가 일치하였다. 2가지 방법의 잡음 파라미터 결과가 일치하는 것은 6-포트 회로망으로 측정된 잡음파라미터가 전원 임피던스의 변화에 따라 측정된 DUT의 잡음지수를 정확히 예측한다는 것을 의미하며, 이를 통해 6-포트 회로망으로 측정된 잡음 파라미터 결과가 검증되었다.

내장형 스위치드 커패시터 Quasi-Z-소스 인버터 (Embedded switched-capacitor quasi-Z-source inverter topology)

  • 이재원;현지석;전태원;이홍희;김흥근
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 추계학술대회 논문집
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    • pp.220-221
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    • 2016
  • This paper proposes an active switched-capacitor embedded quasi-Z-source inverter (ASC-EqZSI) topology. In order to improve boost ability, One diode and one switch device are added in the qZSI impedance network, and a single dc source is shifted in series with the inductor in the impedance network. The performances of the proposed topology are verified with simulation and experimental results.

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