• Title/Summary/Keyword: Impact Ionization

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Impact Ionization Rates of Electron in GaAs/AlGaAs Qunantum Well Using EMC Simulation (EMC Simulation을 이용한 GaAs/AlGaAs 양자 우물 내 전자의 충돌 이온화율)

  • 윤기정;홍창희
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.11a
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    • pp.221-225
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    • 1994
  • We described the impact ionization rates of electron in GaAs/AlGaAs MQH(multi- quantum well) using EMC(ensenble Monte Carlo) simulation. Hot electron energy of injected into quantum well is increasing nearly liearly due to the applied electric field to the barrier of MQM inspite of various Al mole fraction in AlGaAs or barrier width. Impact ionization rates are decreasing exponentially by increasing Al mole fraction, and they have peak vague due to the barrier width.

Implementation of local model for non-local impact ionization (Non-local impact ionization 현상해석을 위한 local model 개발)

  • 염기수
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.05a
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    • pp.385-388
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    • 1999
  • A new local model for impact ionization coefficients is proposed to account for a non-local effect. New model uses an effective electric field which comes from the path integral of a tangent electric field at an arbitrary point. The model consists of local variables, such as doping concentration, carrier concentration and gradient of the field, and can be easily applied to a conventional drift-diffusion device simulator. By comparing the results with Monte Carlo simulation, it is confirmed that new model explains the non-local effect fairly well.

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Hot carrier effects and device degradation in deep submicrometer PMOSFET (Deep submicrometer PMOSFET의 hot carrier 현상과 소자 노쇠화)

  • 장성준;김용택;유종근;박종태;박병국;이종덕
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.4
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    • pp.129-135
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    • 1996
  • In this paper, the hot carrier effect and device degradation of deep submicrometer SC-PMOSFETs have been measured and characterized. It has been shown that the substrate current of a 0.15$\mu$m PMOSFET increases with increasing of impact ionization rate, and the impact ionization rate is a function of the gate length and gate bias voltage. Correlation between gate current and substrate current is investigated within the general framework of the lucky-electron. It is found that the impact ionization rate increases, but the device degradation is not serious with decreasing effective channel length. SCIHE is suggested as the possible phusical mechanism for enhanced impact ionization rate and gate current reduction. Considering the hot carrier induced device degradation, it has been found that the maximum supply voltage is about -2.6V for 0.15$\mu$m PMOSFET.

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Phonon Scattering and Impact ionization for Silicon using Full Band Model at 77K (풀밴드 모델을 이용한 77K Si의 포논산란 및 임팩트이온화에 관한 연구)

  • 유창관;고석웅;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.11a
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    • pp.552-554
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    • 1999
  • Phonon scattering and impact ionization models have been presented to analyze hot carrier transport in high energy region, using full band model and Fermi's golden rule. We have investigated temperature dependent properties for impact ionization process of Si using realistic energy band structures at 77K and look. The realistic full band model, obtained from the empirical pseudopotential method with local from factors, is used to calculate scattering rate. The accurate calculation of impact ionization rate requires the use of a wavevector- and frequency-dependent dielectric function ξ ( q,$\omega$). The empirical phonon scattering rate P$\sub$ph/, is given by deriving from linear function for P$\sub$ph/ versus D(E) since the phonon scattering rate is linearly depended on density of states D(E). Impact ionization rate p,, is calculated from the first principle's theory. and fitted by modified Keldysh formula having power of above 2.

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Performance of capacitorless 1T-DRAM cell on silicon-germanium-on-insulator (SGOI) substrate (SGOI 기판을 이용한 1T-DRAM에 관한 연구)

  • Jung, Seung-Min;Oh, Jun-Seok;Kim, Min-Soo;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.346-346
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    • 2010
  • A capacitorless one transistor dynamic random access memory (1T-DRAM) on silicon-germanium-on-insulator substrate was investigated. SGOI technology can make high effective mobility because of lattice mismatch between the Si channel and the SiGe buffer layer. To evaluate memory characteristics of 1T-DRAM, the floating body effect is generated by impact ionization (II) and gate induced drain leakage (GIDL) current. Compared with use of impact ionization current, the use of GIDL current leads to low power consumption and larger sense margin.

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Tail Electron Hydrodynamic Model for Consisten Modeling of Impact Ionization and Injection into Gate Oxide by Hot Electrons (고온전자의 충돌 이온화 및 게이트 산화막 주입 모델링을 위한 Tail 전자 Hydrodynamic 모델)

  • 안재경;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.3
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    • pp.100-109
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    • 1995
  • A new Hydrodynamic model for the high energy tail electrons(Tail Electron Hydrodynamic Model : TEHD) is developed using the moment method. The Monte Carlo method is applied to a $n^{+}-n^{-}-n^{+}$ device to calibrate the TEHD equations. the discretization method and numerical procedures are explained. New models for the impact ionization and injection into the gate oxide using the tail electron density are proposed. The simulated results of the impact ionization rate for a $n^{+}-n^{-}-n^{+}$ device and MOSFET devices, and the gate injection experiment are shown to give good agreement with the Monte Carlo simulation and the measurements.

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Fast Screening of Harmful Disinfectants in Household Products via Low-Temperature Plasma Ionization-Mass Spectrometry

  • Lee, Hyoung Jun;Kweon, Gi Ryang;Yim, Yong-Hyeon
    • Mass Spectrometry Letters
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    • v.8 no.2
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    • pp.44-47
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    • 2017
  • Isothiazolinone derivatives are widely used in consumer products as disinfectants or preservatives, but there are growing concerns about their impact on human health. Therefore, rapid screening of these biocides is very important for proper control and regulation of potentially hazardous substances. To this end, low-temperature plasma (LTP) ionization mass spectrometry (MS) was investigated to demonstrate its potential for direct and selective analysis of isothiazolinones from sprayed aerosol samples. Benzisothiazolinone (BIT) was clearly identified from a commercial fabric deodorant using LTP ionization MS and MS/MS. LTP allowed selective ionization of BIT directly from the simply sprayed aerosol sample and illustrated its potential for fast screening without sample pre-treatments. Selective nature of LTP ionization, on the other hands, implicates use of LTP ionization MS as a general screening method for specific groups of hazardous chemicals in commercial products.

Analysis of Impact ionization models for Si n-MOSFET (Si기반 n-MOSFET의 임팩트이온화모델 분석)

  • ;;;Chaisak Issro
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.268-270
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    • 2002
  • For analysis of semiconductor's electrons transmission characteristics, Impact ionization(I.I.) is very important. I.I. are generation process of electron-hole pairs. Therefore, the characteristics of device can change along with applied voltage or temperature. In this paper, we are scaled down the gate length to 50nm. Also, using TCAD simulator, we are analyzed I.I. and breakdown about three models-Van Overstraeten , Okuto and Ours models.

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Study of Capacitorless 1T-DRAM on Strained-Silicon-On-Insulator (sSOI) Substrate Using Impact Ionization and Gate-Induced-Dran-Leakage (GIDL) Programming

  • Jeong, Seung-Min;Jeong, Hong-Bae;Lee, Yeong-Hui;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.285-285
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    • 2011
  • 최근 반도체 소자의 미세화에 따라, 단채널 효과에 의한 누설전류 및 소비전력의 증가 등이 문제되고 있다. 대표적인 휘발성 메모리인 dynammic random access memory (DRAM)의 경우, 소자의 집적화가 진행됨에 따라 저장되는 정보의 양을 유지하기 위해 캐패시터영역의 복잡한 공정을 요구하게 된다. 하나의 캐패시터와 하나의 트랜지스터로 이루어진 기존의 DRAM과 달리, single transistor (1T) DRAM은 silicon-on-insulator (SOI) 기술을 기반으로 하여, 하나의 트랜지스터로 DRAM 동작을 구현한다. 이러한 구조적인 이점 이외에도, 우수한 전기적 절연 특성과 기생 정전용량 및 소비 전력의 감소 등의 장점을 가지고 있다. 또한 strained-Si 층을 적용한 strained-Silicon-On-Insulator (sSOI) 기술을 이용하여, 전기적 특성 및 메모리 특성의 향상을 기대 할 수 있다. 본 연구에서는 sSOI 기판위에 1T-DRAM을 구현하였으며, impact ionization과 gate induced-drain-leakage (GIDL) 전류에 의한 메모리 구동 방법을 통해 sSOI 1T-DRAM의 메모리 특성을 평가하였다. 그 결과 strain 효과에 의한 전기적 특성의 향상을 확인하였으며, GIDL 전류를 이용한 메모리 구동 방법을 사용했을 경우 낮은 소비 전력과 개선된 메모리 윈도우를 확인하였다.

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Characteristics of Subthreshold Leakage Current in Symmetric/Asymmetric Double Gate SOI MOSFET (대칭/비대칭 double 게이트를 갖는 SOI MOSFET에서 subthreshold 누설 전류 특성 분석)

  • Lee, Ki-Am;Park, Jung-Ho
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1549-1551
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    • 2002
  • 현재 게이트 길이가 100nm 이하의 MOSFET 소자를 구현할 때 가장 대두되는 문제인 short channel effect를 억제하는 방법으로 제안된 소자 중 하나가 double gate (DG) silicon-on-insulator (SOI) MOSFET이다. 그러나 DG SOI MOSFET는 두 게이트간의 align과 threshold voltage control 문제가 있다. 본 논문에서는 DG SOI MOSFET에서 이상적으로 게이트가 align된 구조와 back 게이트가 front 게이트보다 긴 non-align된 구조가 subthreshold 동작 영역에서 impact ionization에 미치는 영향에 대해 시뮬레이션을 통하여 비교 분석하였다. 그 결과 게이트가 이상적으로 align된 구조보다 back 게이트가 front 게이트보다 긴 non-align된 구조가 게이트와 드레인이 overlap된 영역에서 impact ionization이 증가하였으며 게이트가 각각 n+ 폴리실리콘과 p+ 폴리실리콘을 가진 소자에서 두 게이트가 같은 work function을 가진 소자보다 높은 impact generation rate을 가짐을 알 수 있었다.

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