• 제목/요약/키워드: Image chip

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Evolutionary Design of Image Filter Using The Celoxica Rc1000 Board

  • Wang, Jin;Jung, Je-Kyo;Lee, Chong-Ho
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.1355-1360
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    • 2005
  • In this paper, we approach the problem of image filter design automation using a kind of intrinsic evolvable hardware architecture. For the purpose of implementing the intrinsic evolution process in a common FPGA chip and evolving a complicated digital circuit system-image filter, the design automation system employs the reconfigurable circuit architecture as the reconfigurable component of the EHW. The reconfigurable circuit architecture is inspired by the Cartesian Genetic Programming and the functional level evolution. To increase the speed of the hardware evolution, the whole evolvable hardware system which consists of evolution algorithm unit, fitness value calculation unit and reconfigurable unit are implemented by a commercial FPGA chip. The Celoxica RC1000 card which is fitted with a Xilinx Virtex xcv2000E FPGA chip is employed as the experiment platform. As the result, we conclude the terms of the synthesis report of the image filter design automation system and hardware evolution speed in the Celoxica RC1000 card. The evolved image filter is also compared with the conventional image filter form the point of filtered image quality.

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A Method to Improve Matching Success Rate between KOMPSAT-3A Imagery and Aerial Ortho-Images (KOMPSAT-3A 영상과 항공정사영상의 영상정합 성공률 향상 방법)

  • Shin, Jung-Il;Yoon, Wan-Sang;Park, Hyeong-Jun;Oh, Kwan-Young;Kim, Tae-Jung
    • Korean Journal of Remote Sensing
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    • v.34 no.6_1
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    • pp.893-903
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    • 2018
  • The necessity of automatic precise georeferencing is increasing with the increase applications of high-resolution satellite imagery. One of the methods for collecting ground control points (GCPs) for precise georeferencing is to use chip images obtained by extracting a subset of an image map such as an ortho-aerial image, and can be automated using an image matching technique. In this case, the importance of the image matching success rate is increased due to the limitation of the number of the chip images for the known reference points such as the unified control point. This study aims to propose a method to improve the success rate of image matching between KOMPSAT-3A images and GCP chip images from aerial ortho-images. We performed the image matching with 7 cases of band pair using KOMPSAT-3A panchromatic (PAN), multispectral (MS), pansharpened (PS) imagery and GCP chip images, then compared matching success rates. As a result, about 10-30% of success rate is increased to about 40-50% when using PS imagery by using PAN and MS imagery. Therefore, using PS imagery for image matching of KOMPSAT-3A images and aerial ortho-images would be helpful to improve the matching success rate.

Characteristics of Gold and Silver Based Bi- and Tri-metallic SPR Chip in the Intensity Measurement Mode (반사광 측정 모드에서 금과 은을 사용한 이층 금속 칩과 삼층 금속 칩의 특성 연구)

  • Kim, Hyungjin;Kim, Chang-duk;Sohn, Young-Soo
    • Journal of Sensor Science and Technology
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    • v.25 no.2
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    • pp.143-147
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    • 2016
  • Characteristics of the conventional gold (Au) surface plasmon resonance (SPR) chip, bi-metallic(Au/silver (Ag)) SPR chip, and tri-metallic(Au/Ag/Au) SPR chip were investigated and compared in the intensity measurement mode for the enhancement of SPR image sensor reactivity. Reflectance curves of the Au, bi- and tri-metallic SPR chips were acquired in phosphate-buffered saline (PBS) solution and were compared. The line width of the reflectance curve of the bi-metallic chip was the narrowest among the three different types of the chips. Also, the tangential slope of the bi-metallic chip was steeper than those of the other chips. Various concentrations of bovine serum albumin (BSA) were utilized in the SPR experiment. As a result, among the above three chips reflectance variation value of the bi-metallic chip was the largest.

Characteristic of size distribution of rock chip produced by rock cutting with a pick cutter

  • Jeong, Hoyoung;Jeon, Seokwon
    • Geomechanics and Engineering
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    • v.15 no.3
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    • pp.811-822
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    • 2018
  • Chip size distribution can be used to evaluate the cutting efficiency and to characterize the cutting behavior of rock during cutting and fragmentation process. In this study, a series of linear cutting tests was performed to investigate the effect of cutting conditions (specifically cut spacing and penetration depth) on the production and size distribution of rock chips. Linyi sandstone from China was used in the linear cutting tests. After each run of linear cutting machine test, the rock chips were collected and their size distribution was analyzed using a sieving test and image processing. Image processing can rapidly and cost-effectively provide useful information of size distribution. Rosin-Rammer distribution pamameters, the coarseness index and the coefficients of uniformity and curvature were determined by image processing for different cutting conditions. The size of the rock chips was greatest at the optimum cut spacing, and the size distribution parameters were highly correlated with cutter forces and specific energy.

Design and implementation of the SliM image processor chip (SliM 이미지 프로세서 칩 설계 및 구현)

  • 옹수환;선우명훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.10
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    • pp.186-194
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    • 1996
  • The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

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A Study on the Practical Application of Image Control Point Using Stereo Image Chip (입체 영상칩을 이용한 영상기준점 활용방안에 관한 연구)

  • Kim, Hoon-Jung;Kim, Kam-Lae;Cheong, Hae-Jin;Cho, Won-Woo
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.26 no.4
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    • pp.423-431
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    • 2008
  • The control surveying which aims at identifying the coordinate system of satellite images with that of ground is a repeatedly performed essential process to produce digital ortho - photos and it acts as the main factor to increase the production cost of the photos by duplicated budgets and redundant works when executing the projects for acquiring basic geographical information from high density satellite images. During the experimentation, an application system was established for producing a stereo image chip by the analysis of DPPDB file structure, the stereo image chip was produced with SPOT and IKONOS images, the analysis of 3D modeling accuracy was performed to secure the required accuracy and to present the optimal number and deployment of the control points, and a 3D modeling was performed for new SPOT images and lastly, 3D ground coordinates were extracted by the observation of the same points through the overlapping with the new images. As the results of the research, it is proved that the stereo image chip can be used as the ground controls through the accuracy analysis between the coordinates of the images and the ground, close results were obtained between the coordinates by the ground survey and those by the 3D modeling using new images and the observation of the same points, positional changes were not found during observing the same points, and the research presented the methodology for improving the process of the control survey by showing the availability of the image controls on the stereo image chip instead of the ground controls.

The Tracing Algorithm for Center Pixel of Character Image and the Design of Neural Chip (문자영상의 중심화소 추적 알고리즘 및 신경칩 설계)

  • 고휘진;여진경;정호선
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.29B no.8
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    • pp.35-43
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    • 1992
  • We have presented the tracing algorithm for center pixel of character image. Character image was read by scanner device. Performing the tracing process, it can be possible to detect feature points, such as branch point, stroke of 4 directions. So, the tracing process covers the thinning and feature point detection process for improving the processing time. Usage of suggested tracing algorithm instead of thinning that is the preprocessing of character recognition increases speed up to 5 times. The preprocessing chip has been designed by using single layer perceptron algorithm.

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A Reconfigurable Image Processing SoC Based on LEON 2 Core (LEON 2 코어 기반 재구성 가능 영상처리 SoC 개발)

  • Lee, Bong-Kyu
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.7
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    • pp.1418-1423
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    • 2009
  • This paper describes the design and implementation of a System-on-a-Chip (SoC) for image processing applications to use in wearable/mobile products. The target Soc consists of LEON 2 core, AMBA/APB bus-systems and custom-designed controllers. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, an image processing application is performed.

Development of Registration Image Chip Tool and Web Server for Building GCP DB (GCP DB 구축을 위한 영상칩 제작 툴 개발 및 Web서버 구축)

  • 손홍규;김기홍;김호성;백종하
    • Proceedings of the Korean Society of Surveying, Geodesy, Photogrammetry, and Cartography Conference
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    • 2004.04a
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    • pp.275-278
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    • 2004
  • The geo-referencing of satellite imagery is a key task in remote sensing. GCPs are points the position of which is known both in the image and in the supporting maps. Mapping function makes the determination of map coordinates of all image pixels possible. Generally manual operations are done to identify image points corresponding to the points on a digital topographic map. In order to accurately measure ground coordinates of GCPs, differential global positioning system (DGPS) surveying are used. To acquire the sufficient number of well distributed GCPs is one of the most time-consuming and cost-consuming tasks. This paper describes the procedure of automatically extracting GCOs using GCP database. GCP image chips and image matching technique are used for automatic extraction of GCPs. We developed image processing tool for making image chip GCPs and Web Server for management of GCPs.

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5.25GHz Image Rejection Low Noise Amplifier and Mixer for Wireless LAN (무선랜을 위한 5.25GHz 이미지 제거 저 잡음 증폭기 및 믹서 설계)

  • Lee, Jun-Jae;Kong, Dong-Ho;Choo, Sung-Joong;Park, Jung-Ho
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.893-896
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    • 2005
  • This paper describes Low Noise Amplifier(LNA) and Single Balanced Mixer(SBM) with monolithic image rejection notch filter using 0.5um MESFET process. LNA, Notch filter, and SBM were integrated on a chip. This chip does not need off chip SAW filter, thereby reducing the overall cost and system volume. The LNA with Notch filter provides a gain of 15dB, noise figure of 1.2dB, and image rejection ratio of -74dB. The SBM has a conversion gain of 6dB.

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