• Title/Summary/Keyword: ISA

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Branch Predictor Design and Its Performance Evaluation for A High Performance Embedded Microprocessor (고성능 내장형 마이크로프로세서를 위한 분기예측기의 설계 및 성능평가)

  • Lee, Sang-Hyuk;Kim, Il-Kwan;Choi, Lynn
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.129-132
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    • 2002
  • AE64000 is the 64-bit high-performance microprocessor that ADC Co. Ltd. is developing for an embedded environment. It has a 5-stage pipeline and uses Havard architecture with a separated instruction and data caches. It also provides SIMD-like DSP and FP operation by enabling the 8/16/32/64-bit MAC operation on 64-bit registers. AE64000 processor implements the EISC ISA and uses the instruction folding mechanism (Instruction Folding Unit) that effectively deals with LERI instruction in EISC ISA. But this unit makes branch prediction behavior difficult. In this paper, we designs a branch predictor optimized for AE64000 Pipeline and develops a AES4000 simulator that has cycle-level precision to validate the performance of the designed branch predictor. We makes TAC(Target address cache) and BPT(branch prediction table) seperated for effective branch prediction and uses the BPT(removed indexed) that has no address tags.

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A Study on Flow Velocity Distribution at Inlet and Exit of Diesel Particulate Filter with L-Shape Inlet Connector Using Automatic Measurement (측정자동화에 의한 입구연결부 형상이 L-형인 디젤매연필터 입.출구에서의 유속 분포에 관한 연구)

  • Lee, Choong-Hoon;Bae, Sang-Hong;Choi, Ung;Lee, Su-Ryong
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.16 no.4
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    • pp.93-100
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    • 2007
  • The flow velocity distribution at inlet and exit of Diesel Particulate Filter(DPF) by fabricating L-shape connector with the DPF was measured using a Pitot-tube and 2-D transverse machine. An adaptor designed for making the Pitot tube probe access to the inlet and exit of the DPF was connected with the inlet and exit flange of the DPF, respectively. The Pitot tube which was mounted in the 2-D positioning machine could access to the inlet and exit of the DPF through the rectangular window of the adaptor. The L-shape connector in the DPF inlet has a flow guide which is a perforated steel pipe. The flow velocity distribution at the inlet of the DPF showed a chaotic velocity distribution which is different from that with a diffuser type connector. The velocity distribution at the exit of the DPF showed a crown shape which is similar to that of the diffuser type connector. The velocity distribution at the exit of DPF showed different patterns according to the air flow rate.

Study on ISA's assessment to software process for EN50128 SIL4 (EN50128 SIL4 소프트웨어 프로세스 ISA 인증 사례 연구)

  • Cho, Chi-Hwan;Kang, Chan-Yong;Hwang, Jin-Ho
    • Proceedings of the KSR Conference
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    • 2010.06a
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    • pp.838-849
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    • 2010
  • It is inevitable to control the systematic failure to obtain the software safety integrity of embedded software installed in rolling stock. Because it is not possible to assess systematic failure integrity by quantitative methods, SILs are used to group documentation, methods, tools and techniques throughout software development lifecycle which, when used effectively, are considered to provide an appropriate level of confidence in the realization of a system to a stated integrity level. Normally, safety approval process is through generic product, generic application and specification application for. For safety approval on generic application of software based system, it is required to apply the certified software processes from the planning stage for the assigned SIL. As such, we will develop project specific application with high safety integrity within time limit of contractual delivery schedule through software assessment to the modified area with the re-use of certified software module and documentation. At this point, Hyundai Rotem has developed software processes applicable to support SIL 4 based on EN50128 which was assessed and certified by TUV SUD. This paper introduces the Hyundai Rotem's detailed approach and prospective action to achieve software safety integrity level.

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The Relationship between Primary and Secondary Literature (학술정보에 있어서 1차 자료와 2차 자료의 관계에 대한 연구)

  • Oh Dong-Woo
    • Journal of the Korean Society for Library and Information Science
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    • v.33 no.1
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    • pp.145-160
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    • 1999
  • The literature may be divided into two broad categories : primary and secondary literature. Primary literature comprises documents which contain the full text of the author's work. On the other hand secondary literature, such as indexes, abstracts, bibliographies reviews and surveys, provides signposts to the primary literature. This paper intended to examine and analyze the relationship between primary and secondary literature through the previous research and the theory, and the actual study which compared it with the lists of journals in three secondary literatures: Library and Information Science Abstracts(LISA). 1998; Library Literature (LL), 1998; Information Science Abstracts (ISA), 1998. Some of the problem involved in the study of journal overlap and coverage patterns of secondary services are discussed. Conclusions are drawn about the impact on library and information science selection policies and organization of library collections.

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Noncommutativity Error Analysis with RLG-based INS (링레이저 자이로 관성항법시스템의 비교환 오차 해석)

  • Kim, Gwang-Jin;Park, Chan-Guk;Yu, Myeong-Jong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.34 no.1
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    • pp.81-88
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    • 2006
  • In this paper, we analyze a noncommutativity error that is not able to be compensated with integrating gyro outputs in RLG-based INS. The system can suffer from some motion known as RLG dithering motion, coning motion, ISA motion derived by an AV mount and vehicle real dynamic motion. So these motions are a cause of the noncommutativity error, the system error derived by each motion has to be analyzed. For the analysis, a relation between rotation vector and gyro outputs is introduced and applied to define the coordinate transformation matrix and the angular vector.

Design of High Speed Analog Input Card for Ultrasonic Testing (초음파 탐상을 위한 고속 아날로그 입력 카드의 설계)

  • 이병수;이동원;박두석
    • Journal of the Korea Society of Computer and Information
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    • v.5 no.4
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    • pp.62-68
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    • 2000
  • It was designed a high-speed analog input card that is a important device of ultrasonic testing flaw detector in the middle of non-destructive testing in this Paper. The A/D Board is inquired high-speed sampling rate and fast data acquisition system. This pater shows a design that has a function of Peak- Detection for ultrasonic testing by ISA Bus type and a 50MHz of A/D converter in order to do sampling more than quadruple frequency of transducer frequency.

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Implementation of file format analyzer for binary vulnerability analysis (바이너리 취약점 분석을 위한 파일 포맷 분석기 구현)

  • Oh, DongYeop;Ryu, Jea-cheol
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2018.07a
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    • pp.466-469
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    • 2018
  • 최근 PC를 비롯한 모바일, IOT 기기 등 다양한 환경에서의 사이버 공격이 기승을 부리고 있으며, 그 방법 또한 나날이 발전하고 있다. 이러한 사이버위협으로부터 개인 및 기업의 자산을 지키기 위한 근본적인 대안이 없이는 매번 반복적인 피해를 피하기 어려운 현실이다. 다양한 환경이라고 함은, 다양한 OS(Operation System), 다양한 ISA (Instruction Set Architecture)의 조합으로 이루어지는 사이버환경을 의미한다. 이러한 조합들은 일반 사용자들에게 가장 많이 쓰이는 Windows & Intel 조합의 환경과, Linux & Intel 또는 Linux & ARM 등 기업에서 서비스를 위해 쓰이는 서버 환경 등을 예로 들 수 있다. 그밖에 최근 IOT기기나 모바일 기기와 같은 환경도 있을 수 있다. 바이너리 파일에 대한 보안은 다양한 연구가 진행되고 있지만 그 범위가 방대하고, 깊이가 필요한 영역이라 진입 장벽이 높은 실정이다. 본 논문에서는 이러한 바이너리의 취약점을 분석하기 위한 첫 번째 단계로써 다양한 바이너리 파일을 하나의 정형화된 자료구조로 변환하는 바이너리 포맷 분석기의 한 방법을 제시하고자 한다. 다양한 OS와 다양한 ISA환경에서 사용되는 바이너리들에서 공통적으로 존재하는 정보들 중, 바이너리의 취약점 분석을 위해 필요한 데이터를 보다 효율적으로 수집하고, 관리하는 것이 바이너리를 통한 사이버 위협을 탐지하는 연구에서 기초가 된다고 할 수 있기 때문이다.

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Analysis of Flow Rate Inducing Voltage Loss in a 100 cm2 Class Molten Carbonate Fuel Cell

  • Lee, Choong-Gon
    • Journal of Electrochemical Science and Technology
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    • v.2 no.1
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    • pp.20-25
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    • 2011
  • This work focuses on the behavior of the overpotential increase due to a utilization rise in a molten carbonate fuel cell. The behavior is generally explained by Nernst loss, which is a kind of voltage loss due to the thermodynamic potential gradients in a polarization state due to the concentration distribution of reactant species through the gas flow direction. The evaluation of Nernst loss is carried out with a traditional experimental method of constant gas utilization (CU). On the other hand, overpotential due to the gas-phase mass-transport resistance at the anode and cathode shows dependence on the utilization, which can be measured using the inert gas step addition (ISA) method. Since the Nernst loss is assumed to be due to the thermodynamic reasons, the voltage loss can be calculated by the Nernst equation, referred to as a simple calculation (SC) in this work. The three values of voltage loss due to CU, ISA, and SC are compared, showing that these values rise with increases in the utilization within acceptable deviations. When we consider that the anode and cathode reactions are significantly affected by the gas-phase mass transfer, the behavior strongly implies that the voltage loss is attributable not to thermodynamic reasons, namely Nernst loss, but to the kinetic reason of mass-transfer resistance in the gas phase.

Design md Implementation for the Remote Real Time Process Monitoring and Control System based on the JMF (JMF 기반의 실시간 원격 공정 감시 및 제어 시스템 설계 및 구현)

  • Kim, Sam-Ryong;Lim, In-Taek;Lee, Jeong-Bae
    • The KIPS Transactions:PartD
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    • v.11D no.2
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    • pp.453-460
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    • 2004
  • In this thesis, remote conveyor control and monitoring system is designed and Implemented for shoes production process based on Lego prototyping mechanism by using the I/O interface control board for the ISA Interface control board. A conveyor server for real time profess control is implemented based on RTLinux(Real-Time Linux) so that users deride priority of work. And device driver is implemented bated on the RTLinux. Through this system, real-time Client/server monitoring environments Is implemented and tested. And the JMF(Java Media Framework) based monitoring system was implemented and the total processing status war monitored.

Simulation and Synthesis of RISC-V Processor (RISC-V 프로세서의 모의실행 및 합성)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.1
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    • pp.239-245
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    • 2019
  • RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. In this paper, according to the emergence of RISC-V architecture, we describe the RISC-V processor instruction set constituted by arithmetic logic, memory, branch, control, status register, environment call and break point instructions. Using ModelSim and Quartus-II, 38 instructions of RISC-V has been successfully simulated and synthesized.