• Asia-Pacific Journal of Business Venturing and Entrepreneurship
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• v.14 no.5
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• pp.1-11
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• 2019

Financing plays an important role in the survival and growth of startups. This study investigates key factors that improve startup financing performance. To this end, we analyze the relationship between the proportion of intellectual property and the financing performance. In addition, this study also examine the impact of the founder's education level on the financing of startups, and the moderating effect of the founder's education level on the relationship between intellectual property proportion and financing. Based on the survey data of 331 startups, this study found that the proportion of intellectual property and the financing performance have an inverted U-shaped nonlinear relationship. While the founder's education level has a positive impact on the financing performance, it negatively moderate the relationship between the intellectual property proportion and the financing performance. Through these findings, this study suggests that it is necessary to maintain an adequate proportion of intellectual property in order to maximize startup financing performance. The higher education level of founder enhances the startup financing. Since the founder's education level weaken the effect of intellectual proporty's effect on startup financing, however, startups need to control the proportion of intellectual property to improving financing according to the founder's education level. Based on signal theory, this study proposes a new strategy of intellectual property to enhance startup financing performance.

• Journal of Technology Innovation
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• v.14 no.3
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• pp.1-21
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• 2006

The explosion in creation and utilization of IP including Patent since 1980s has been regarded as typical trend affecting the environment for technological innovation. Korea also has shown massive creation of IP. These stimulate the focused interest on the effectiveness of IP for protecting the innovation output. We try to analyze the determinants of this effectiveness in Korean manufacturing sector in terms of the charactenstics of firm's innovation strategy. It is shown that, for protection for product innovation, as being larger, and as having made innovation, the IP protection is regarded as effective, and firms making cooperative R&D have a higher possibility of using IP protection. And larger firms give a higher recognition to effectiveness of IP protection irrespective of the types of innovation such as product innovation and process innovation.

• Proceedings of the Korean Society of Computer Information Conference
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• 2020.07a
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• pp.539-542
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• 2020

모바일 게임의 시장에서 기존 PC 게임, 애니메이션, 웹툰 등 원작 IP를 활용한 게임들이 늘고 있다. 그중 웹툰 IP를 활용하여 제작되는 게임이 종종 출시되고 있지만 흥행하지 못하는 게 현재의 웹툰 IP 게임의 상황이다. 본 논문에서는 원작 IP 중 웹툰 IP를 기반으로 제작한 게임들의 특징을 살펴보고 성공요소와 실패요소에 대해 분석한다. 본 논문에서 제시한 성공요소와 실패요소는 웹툰 IP를 기반으로 게임을 개발할 때 고려할 요소로 활용할 수 있을 것이다.

• Proceedings of the Korean Society of Computer Information Conference
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• 2020.01a
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• pp.213-216
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• 2020

모바일 게임의 시장에서 기존 PC 게임, 애니메이션, 웹툰 등 원작 IP를 활용한 게임들이 늘고 있다. 원작 IP를 활용하면서 기존 팬들과 대중들의 관심을 받을 수 있지만 모든 게임이 성공하지는 못하고 있다. 본 논문에서는 원작 IP를 기반으로 성공한 게임들의 특징을 살펴보고 성공요소에 대한 공통점을 분석한다. 본 논문에서 제시한 성공 요소는 원작 IP를 기반으로 게임을 개발할 때 고려할 요소로 활용할 수 있을 것이다.

• IT SoC Magazine
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• s.16
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• pp.10-11
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• 2006

정보통신부가 주최하고 정보통신연구진흥원, IT-SoC협회, 한국전자통신연구원이 주관하는 ‘IT-SoC Fair 2006’이 지난 11월 1일~2일 양일간 COEX 인도양홀에서 개최되었다. 이 행사는 Fabless 반도체업체들이 중심이 되는 SoC(System on Chip)/IP(Silicon Intellectual Property)전문 전시회로 IT 핵심부품산업을 진흥하고자 하는 취지로 매년 개최되는 행사이다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.10B
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• pp.1482-1490
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• 2001

디지털 통신 시스템 및 신호처리 회로의 핵심 연산블록으로 사용될 수 있는 복소수 승산기 코어의 파라미터화된 소프트 IP (Intellectual Property)를 설계하였다. 승산기는 응용분야에 따라 요구되는 비트 수가 매우 다양하므로, 승산기 코어 IP는 비트 수를 파라미터화하여 설계하는 것이 필요하다. 본 논문에서는 복소수 승산기의 비트 수를 파라미터화 함으로써 사용자의 필요에 따라 승수와 피승수를 8-b∼24-b 범위에서 2-b 단위로 선택하여 사용할 수 있도록 하였으며, GUI 환경의 코어 생성기 PCMUL_GEN는 지정된 비트 크기를 갖는 복소수 승산기의 VHDL 모델을 생성한다. 복소수 승산기 코어 IP는 redundant binary (RB) 수치계와 본 논문에서 제안하는 새로운 radix-4 Booth 인코딩/디코딩 회로를 적용하여 설계되었으며, 이를 통해 기존의 방식보다 단순화된 내부 구조와 고속/저전력 특성을 갖는다. 설계된 IP는 Xilinx FPGA로 구현하여 기능을 검증하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.5B
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• pp.484-489
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• 2011

Most of IT small businesses in Korea are companies which usually take parts from the technically advanced companies and assemble the parts into a complete whole for big companies. Intellectual property-related issue of IT small businesses in Korea is not the direct action or claim but the matter of contract concerning the 3rd party intellectual property infringement or the matter of each of the applicable law on the implied liability issues. Because bargaining power of the IT small businesses is not as big as the technically advanced companies, they can not receive explicit guarantees. Therefore, government-affiliated organization should concern about this matter of contract.

• Patent21
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• s.93
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• pp.30-37
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• 2011

Intellectual property (IF) is essential to standards development although countervailing interests among stakeholders can sometimes undermine trust and inhibit progress. A consequence of slow or non-existent standards development is the loss of potential markets that can emerge only with an internationally recognized standard. Standards developing organizations (SDOs) can enable new markets by ensuring fairness and trust in their venues. The IEEE Standards Association (IEEE-SA) is an SDO that has defined specific steps to facilitate this outcome by means of its internationally recognized patent policy. This paper will describe the underlying principles that guided the creation of IEEE-SA' s policy; highlight five of the major elements of the policy; and suggest a process for integrating IF into standards so that IF stakeholders, in conjunction with standards developers, might agree to meet certain expectations in order for the standards-making process is to be successful and encourage market development.

• Proceedings of the Korea Contents Association Conference
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• 2011.05a
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• pp.345-346
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• 2011

XML4IP는 현재 세계지적재산권기구(WIPO)가 특허, 디자인, 상표 정보를 교환하는데 상호운영성을 지향하기 위해 개발하고 있는 표준이다. XML4IP는 단순히 지재권 데이터를 처리하고 교환하는 것 뿐만 아니라 현존하고 있는 각각의 지재권 정보 표준을 대체하는 것을 목적으로 하고 있다. 이에 XML4IP의 현재까지 진행된 표준 내용 및 각국 특허청의 논의내용을 분석하였고, 세계 각국이 지향하는 지재권 정보 처리 방안에 대한 의견을 종합하였다.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.4
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• pp.310-318
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• 2015

In this paper, dual-port eFuse OTP (one-time programmable) memory cells with smaller cell sizes are used, a single VREF (reference voltage) is used in the designed eFuse OTP IP (intellectual property), and a BL (bit-line) sensing circuit using a S/A (sense amplifier) based D F/F is proposed. With this proposed sensing technique, the read current can be reduced to 3.887mA from 6.399mA. In addition, the sensing resistances of a programmed eFuse cell in the program-verify-read and read mode are also reduced to $9k{\Omega}$ and $5k{\Omega}$ due to the analog sensing. The layout size of the designed 32-bit eFuse OTP memory is $187.845{\mu}m{\times}113.180{\mu}m$ ($=0.0213{\mu}m2$), which is confirmed to be a small-area implementation.