• Title/Summary/Keyword: INPUT IMPEDANCE

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Input Impedance Calculation of the Power Line Communication System (전력선 통신 시스템의 입력 임피던스 계산)

  • Chun, Dong-wan;Lee, Jin-taek;Park, Young-Jin;Kim, Kwan-Ho;Shin, Chull-Chai
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9A
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    • pp.983-990
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    • 2004
  • In this paper, we calculated the input impedance of the power line communication(PLC) networks using medium voltage power line. First of all, we proposed input and output teoninal model of PLC network, and calculated the input impedance applying the attenuation constants by radiation loss, conductor loss, dielectric loss. From the calculation result, we knew that the attenuation by radiation loss was largest, and the input impedance appears like a standing wave fonn with a fixed cycle because the high reflection at the input terminal for the characteristic impedance of the power line is very large. And also the cycle of input impedance depends on the coaxial cable length, and the amplitude depends on the characteristic impedance of power line and losses. From the measurement result, calculated result was very similar to the measured result.

Input Impedance Matching Method of Inverted L Antenna using thin Ferrite Film (페라이트 薄膜을 이용한 逆L形 안테나의 入力임피던스 整合法)

  • Lim, Gye-Jae;Jung, Soo-Jin;Choi, Jong-Kwon
    • Resources Recycling
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    • v.13 no.6
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    • pp.26-30
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    • 2004
  • Input impedance of the inverted L antenna which is modified from a monopole antenna varies to very high input impedance value when the ratio of vertical height to horizontal length is reduced. So its impedance matching becomes very difficult. In this paper, we analyzed the input impedance variation range depending on the ratio of vertical height to horizontal length in the normal and ferrite thin film added configuration for the input impedance control. For the exact analysis involving the permittivity, permeability and conductivity of ferrite material, FDTD numerical method is used.

Input impedance matching method of inverted L antenna using thin ferrite film (페라이트 박막을 이용한 역 L 형 안테나의 입력임피던스 정합법)

  • Lim Gye Jae;Jung Soo Jin;Choi Jong Kwon
    • Proceedings of the Korean Institute of Resources Recycling Conference
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    • 2004.12a
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    • pp.43-51
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    • 2004
  • Input impedance of the inverted L antenna which is modified from a monopole antenna varies to very high input impedance value when the ration of vertical height to horizontal length is reduced. So its impedance matching becomes very difficult. In this paper, we analyzed the input impedance variation range depending on the ratio of vertical height to horizontal length in the normal and ferrite thin film added configuration for the input impedance control. For the exact analysis involving the permittivity, permeability and conductivity of ferrite material, FDTD numerical method is used.

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Impedance Matching Method of an Inverted L Monopole Antenna (역 L 형 모노폴 안테나의 임피던스 정합방법)

  • Lim, Gye-jae
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.6 no.1
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    • pp.18-22
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    • 2013
  • Input impedance of the inverted L antenna which is modified from a monopole antenna varies to very high input impedance value when the ratio of vertical height to horizontal length is reduced. So its impedance matching becomes very difficult. In this paper, we analyzed the input impedance variation range depending on the ratio of vertical height to horizontal length in the normal and ferrite thin film added configuration for the input impedance control. For the exact analysis involving the permittivity, permeability and conductivity of ferrite material, FDTD numerical method is used.

Spectral Domain Analysis of Input Impedance and Radiation Pattern in Rectangular Microstrip Patch Antenna on Anisotropy Substrates with Airgap (공기 갭을 갖는 이방성 매질 위의 사각 마이크로스트립 패치 안테나의 입력 임피던스와 방사패턴에 대한파수 영역 해석)

  • 윤중한;곽경섭
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.40 no.5
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    • pp.187-196
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    • 2003
  • Effects of Airgap and anisotropy substrate on input impedance and radiation pattern of rectangular microstrip patch antenna are studied in terms of an integral equation formulation. The input impedance and radiation pattern of microstrip patch antenna is investigated by using Galerkin's moment method in solving the integral equation. Sinusoidal functions are selected as basis functions, which resemble in the actual standing wave on the Patch. From the numerical results, the variation of input impedance and radiation patterns in the variation of air gap thickness, anisotropy ratio of substrate, and relative permittivity of anisotropy substrate are presented.

Input Impedance of the Stcked Microstrip Patch Antenna Using the the cavity Model (캐버티 마들을 이용한 적층 마이크로스트립 안테나의 입력 임피던스)

  • 임기남;이경우이상설
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.339-342
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    • 1998
  • The stacked microstrip patch antenna is modeled by a simple cavity model. Using this model, the input impedance of the stacked microstrip patch antenna fed by a coaxial probe is expressed as a function of antenna paprameters and frequency. We calculate the input impedance of the stacked microstrip patch antenna for the variation of frequency.

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Development of an Input Impedance Evaluation of the AC-DC Transfer Standard for Low Level AC Voltage Standard (교류 저전압 표준용 교류-직류 변환기의 입력임피던스 평가기술 개발)

  • Kwon, Sung-Won;Jung, Jae-Kap;Lee, Sang-Hwa;Kim, Myung-Soo;Kim, Han-Jun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.2
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    • pp.229-234
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    • 2008
  • An AC-DC transfer standard(TS) is used for the AC voltage standard in the range of 2 mV to 1000 V below 1 MHz. Micro-potentiometer(${\mu}Pot$) is used to evaluate the ac-dc transfer difference(ADD) of the TS below 200 mV range. The ADD of the TS were changed by the loading effect caused from the input impedance change of the TS depend on frequency. An input impedance evaluation technique of the TS using ${\mu}Pot$ has been developed.

Design Consideration of the Voltage Multiplier of UHF RFID Tag for Increased Reading Range (인식거리 향상을 위한 UHF 대역 RFID 태그용 전압체배기 설계)

  • Lee, Jong-Wook;Lee, Bom-Son
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.587-590
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    • 2005
  • We investigated the input impedance characteristics of UHF-band RFID tag chip for increased reading range. A voltage multiplier designed using 0.4 ${\mu}m$ $zero-V_T$ MOSFET showed that DC output voltage of 2 V can be obtained using standard CMOS process. The input impedance of the voltage multiplier was examined to achieve impedance level for maximum reading distance using analytical and numerical approaches. The input impedance of the voltage multiplier could be varied in a wide range by selecting the size of MOSFET and the number of multiplying stages of the voltage multiplier, and thus, the impedance level required for the tag antenna can be obtained in presence of other tag circuit blocks.

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A Design of Class A Bipolar Current Conveyor(CCII) with Low Current-Input Impedance and Its Offset Compensated CCII (낮은 전류-입력 임퍼던스를 갖는 A급 바이폴라 전류 콘베이어(CCII)와 그것의 오프셋 보상된 CCII 설계)

  • Cha, Hyeong-U
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.10
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    • pp.754-764
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    • 2001
  • Class A bipolar second-generation current conveyor (CCII) with low current-input impedance and its offset-compensated CCII for high-accuracy current-mode signal processing are proposed. The CCIIs consist of a regulated current-cell for current input, a emitter follower for voltage input, and a cascode current mirror lot current output. In these architecture, the two input stages are coupled by current mirror to reduce the current input impedance. Experiments show that the CCII has impedance of 8.4 Ω and offset voltage of 40 mV at current input terminal. To reduce this offset, the offset-compensated CCII adopts diode-connected npn and pnp transistor in the proposed CCII. Experiments show that the offset-compensated CCII has current input impedance of 2.1 Ω and offset voltage of 0.05 mV. The 3-dB cutoff frequency of the CCIIs when used as a voltage follower extends beyond 30 MHz. The power dissipation is 7.0 mW

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Optimal Design Considerations of a Bus Converter for On-Board Distributed Power Systems

  • Abe, Seiya;Hirokawa, Masahiko;Shoyama, Masahito;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.447-455
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    • 2009
  • The power supply systems, which require low-voltage / high-current output has been changing from the conventional centralized power system to a distributed power system. The distributed power system consists of a bus converter and POL. The most important factor is the system stability in bus architecture design. The overlap between the output impedance of a bus converter input impedance of POL causes system instability and has been an actual problem. By increasing the bus capacitor, the system stability can be easily improved. However, due to limited space on the system board, the increasing of bus capacitors is impractical. An urgent solution of this issue is strongly desired. This paper presents the output impedance design for on-board distributed power system by means of three control schemes of a bus converter. The output impedance peak of the bus converter and the input impedance of the POL are analyzed and then conformed experimentally for stability criterion. Furthermore, the design process of each control schemes for system stability is proposed.