• 제목/요약/키워드: IMEC

검색결과 21건 처리시간 0.042초

Situation of HPV16 E2 Gene Status During Radiotherapy Treatment of Cervical Carcinoma

  • Kahla, Saloua;Kochbati, Lotfi;Maalej, Mongi;Oueslati, Ridha
    • Asian Pacific Journal of Cancer Prevention
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    • 제15권6호
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    • pp.2869-2873
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    • 2014
  • Background: Human papillomavirus (HPV) integration within the E2 gene has been proposed as a critical event in cervical carcinogenesis. This study concerned whether HPV16 status and E2 gene intactness are predictive of radiation response in patients with cervical cancer. Materials and Methods: Biopsies of 44 patients with cervical cancer were collected before or after radiotherapy. The presence of HPV16 was assessed by polymerase chain reaction (PCR) using specific primers for the L1 region. E2 disruption was detected by amplifying the entire E2 gene. Results: HPV16 DNA was found in 54.5% of the clinical samples. Overall, 62.5% of the HPV16 positive tumors had integrated viral genome and 37.5% had episomal genome. There was a tendency of increase of HPV16 E2 negative tumors compared with HPV16 L1 ones in advanced stages (75% versus 20% in stage III respectively). Detection of E2 gene appeared influenced by the radiotherapy treatment, as the percentage of samples containing an intact HPV16 E2 was more frequent in pretreated patients compared to radiotherapy treated patients (66.6% versus 20%). The radiation therapy caused an eight-fold [OR= 8; CI=1.22-52.25; p=0.03] increase in the risk of HPV16 genome disruption. The integration status is influenced by the irradiation modalities, interestingly E2 disruption being found widely after radiotherapy treatment (75%) with a total fractioned dose of 50Gy. Conclusions: This study reveals that the status of the viral DNA may be used as a marker to optimize the radiation treatment.

System-Driven Approaches to 3D Integration

  • Beyne Eric
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2005년도 ISMP
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    • pp.23-34
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    • 2005
  • Electronic interconnection and packaging is mainly performed in a planar, 2D design style. Further miniaturization and performance enhancement of electronic systems will more and more require the use of 3D interconnection schemes. Key technologies for realizing true 3D interconnect schemes are the realization of vertical connections, either through the Si-die or through the multilayer interconnect with embedded die. Different applications require different complexities of 3D-interconnectivity. Therefore, different technologies may be used. These can be categorized as a more traditional packaging approach, a wafer-level-packaging, WLP ('above' passivation), approach and a foundry level ('below' passivation) approach. We define these technologies as respectively 3D-SIP, 3D-WLP and 3D-SIC. In this paper, these technologies are discussed in more detail.

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Interface and Crystallinity of 1,4,5,8,9,11-Hexaazatriphenylene-hexanitrile thin films between an Organic and Transparent Conductive Oxide layers

  • 이현휘;이정환;김장주;김효정
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.248-248
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    • 2016
  • We have investigated the crystallinity, preferential ordering, and interfacial stability of 1,4,5,8,9,11-hexaazatriphenylene-hexanitrile (HATCN) thin film interconnected with organic/inorganic multilayer. At the region close to the organic-organic interface, HATCN formed low crystalline order with substantial amorphous phase. As film growth continued, HATCN stacked with high crystalline phase. After a sputtering deposition of the indium zinc oxide (IZO) layer on top of HATCN/organic layer, the volume fraction of preferentially ordered HATCN crystals increased without any structural deterioration. In addition, the HATCN surface was kept quite stable by preserving the sharp interface between HATCN and sputtering deposited IZO layers.

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Tomographic PIV measurement of internal complex flow of an evaporating droplet with non-uniformly receding contact lines

  • Kim, Hyoungsoo;Belmiloud, Naser;Mertens, Paul W.
    • 한국가시화정보학회지
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    • 제14권2호
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    • pp.31-39
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    • 2016
  • We investigate an internal flow pattern of an evaporating droplet where the contact line non-uniformly recedes. By using tomographic Particle Image Velocimetry, we observe a three-dimensional azimuthal vortex pair that is maintained until the droplet is completely dried. The non-uniformly receding contact line motion breaks the flow symmetry. Finally, a simplified scaling model presents that the mechanical stress along the contact line is proportional to the vorticity magnitude, which is validated by the experimental results.

Multilayer thin Film technology as an Enabling technology for System-in-Package (SIP) and "Above-IC" Processing

  • Beyne, Eric
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.93-100
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    • 2003
  • The continuing scaling trend in microelectronic circuit technology has a significant impact on the different IC interconnection and packaging technologies. These latter technologies have not kept pace with the IC scaling trends, resulting in a so-called“interconnect technology gap”. Multilayer thin film technology is proposed as a“bridge”- technology between the very high density IC technology and the coarse standard PCB technology. It is also a key enabling technology for the realisation of true“System-in-a-Package”(SIP) solutions, combining multiple“System-on-a-Chip”(SOC) IC's with other components and also integrating passive components in its layers. A further step is to use this technology to realise new functionalities on top of active wafers. These additional“above-IC”processed layers may e.g. be used for low loss, high speed on chip interconnects, clock distribution circuits, efficient power/ground distribution and to realize high Q inductors on chip.

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유기 반도체 박막 트랜지스터 기반 프린팅 RFID 기술

  • 구재본;노용영;유인규
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2009년도 춘계학술발표대회
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    • pp.11.2-11.2
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    • 2009
  • 본 발표에서는 flexible display의 back plane 구동 소자, organic sensor, 그리고 organic radio frequency identification (RFID) Tag 등으로의 응용을 목표로 최근 활발히 연구 중인 유기 반도체 박막 트랜지스터에 대한 소개를 바탕으로 유기 반도체를 전자회로 분야에서 사용하기 위해 해결해야 할 문제점과 연구 개발이 절실히 필요한 부분에 대해 소개하고 자 함. organic RFID 응용 기술에 초점을 두고 RFID 기술의 개요, 종류, 주파수 대역 등에 대한 기초적인 지식을 바탕으로 organic RFID의 향후 시장 전망에 대해 토론한 후 현재 PolyIC, Organic ID, IMEC 등의 선진사에서 상용화를 목표로 활발히 연구 중인 organic RFID의 세계적 기술 수준과 최근 연구 결과들을 공유하고자함. 최근 ETRI에서 향 후 바코드 대체용으로 활발히 연구 중인 item level tagging용 13.56 MHz프린팅 RFID 기술을 소개하고 이를 구현하기 위한 유기반도체 트랜지스터, 정류기 등 다양한 종류의 회로들을 프린팅 소재와 공정으로 제작할 때의 문제점을 공유하고, 더 나아가 프린팅 전자 소자의 상용화를 위한 향 후 연구 개발 주제 및 방향 등에 대해 토론하고자함.

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Proposing a gamma radiation based intelligent system for simultaneous analyzing and detecting type and amount of petroleum by-products

  • Roshani, Mohammadmehdi;Phan, Giang;Faraj, Rezhna Hassan;Phan, Nhut-Huan;Roshani, Gholam Hossein;Nazemi, Behrooz;Corniani, Enrico;Nazemi, Ehsan
    • Nuclear Engineering and Technology
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    • 제53권4호
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    • pp.1277-1283
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    • 2021
  • It is important for operators of poly-pipelines in petroleum industry to continuously monitor characteristics of transferred fluid such as its type and amount. To achieve this aim, in this study a dual energy gamma attenuation technique in combination with artificial neural network (ANN) is proposed to simultaneously determine type and amount of four different petroleum by-products. The detection system is composed of a dual energy gamma source, including americium-241 and barium-133 radioisotopes, and one 2.54 cm × 2.54 cm sodium iodide detector for recording the transmitted photons. Two signals recorded in transmission detector, namely the counts under photo peak of Americium-241 with energy of 59.5 keV and the counts under photo peak of Barium-133 with energy of 356 keV, were applied to the ANN as the two inputs and volume percentages of petroleum by-products were assigned as the outputs.

Automated measurement and analysis of sidewall roughness using three-dimensional atomic force microscopy

  • Su‑Been Yoo;Seong‑Hun Yun;Ah‑Jin Jo;Sang‑Joon Cho;Haneol Cho;Jun‑Ho Lee;Byoung‑Woon Ahn
    • Applied Microscopy
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    • 제52권
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    • pp.1.1-1.8
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    • 2022
  • As semiconductor device architecture develops, from planar field-effect transistors (FET) to FinFET and gate-all-around (GAA), there is an increased need to measure 3D structure sidewalls precisely. Here, we present a 3-Dimensional Atomic Force Microscope (3D-AFM), a powerful 3D metrology tool to measure the sidewall roughness (SWR) of vertical and undercut structures. First, we measured three different dies repeatedly to calculate reproducibility in die level. Reproducible results were derived with a relative standard deviation under 2%. Second, we measured 13 different dies, including the center and edge of the wafer, to analyze SWR distribution in wafer level and reliable results were measured. All analysis was performed using a novel algorithm, including auto fattening, sidewall detection, and SWR calculation. In addition, SWR automatic analysis software was implemented to reduce analysis time and to provide standard analysis. The results suggest that our 3D-AFM, based on the tilted Z scanner, will enable an advanced methodology for automated 3D measurement and analysis.

탐침과 시편의 위치를 역전시킨 주사 탐침 현미경용 다이아몬드 탐침의 제작 및 평가 (Design, Fabrication and Evaluation of Diamond Tip Chips for Reverse Tip Sample Scanning Probe Microscope Applications)

  • 김수길;;김진혁
    • 한국재료학회지
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    • 제34권2호
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    • pp.105-110
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    • 2024
  • Scanning probe microscopy (SPM) has become an indispensable tool in efforts to develop the next generation of nanoelectronic devices, given its achievable nanometer spatial resolution and highly versatile ability to measure a variety of properties. Recently a new scanning probe microscope was developed to overcome the tip degradation problem of the classic SPM. The main advantage of this new method, called Reverse tip sample (RTS) SPM, is that a single tip can be replaced by a chip containing hundreds to thousands of tips. Generally for use in RTS SPM, pyramid-shaped diamond tips are made by molding on a silicon substrate. Combining RTS SPM with Scanning spreading resistance microscopy (SSRM) using the diamond tip offers the potential to perform 3D profiling of semiconductor materials. However, damage frequently occurs to the completed tips because of the complex manufacturing process. In this work, we design, fabricate, and evaluate an RTS tip chip prototype to simplify the complex manufacturing process, prevent tip damage, and shorten manufacturing time.