• 제목/요약/키워드: I/O module

검색결과 151건 처리시간 0.037초

Design of A Data Transmission System for Pneumatic System Control

  • Hong, Chun-Pyo;Kim, Dong-Soo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.150.2-150
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    • 2001
  • For pneumatic system control, we need a data transmission system with high speed and reliability for information interchange between main computer and I/O devices. This paper presents a set of design techniques for a data communication system that is mainly used for pneumatic system control. For this purpose, we first designed hardware modules for an interface between central control module and local node that handles the operation of solenoid valves. In addition, we developed a communication protocol for construction of RS-485 based multi-drop network, and this protocol is basically designed with a kind of polling technique. Finally we evaluated performance of the developed system. The field test results show that, even under high noise environment, the data transmission of 375Kbps rate is ...

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안티퓨즈 FPGA의 배선지연시간을 고려한 VHDL 모델링 (VHDL modeling considering routing delay in antifuse-based FPGAs)

  • 백영숙;조한진;박인학;김경수
    • 전자공학회논문지A
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    • 제33A권5호
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    • pp.180-187
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    • 1996
  • This paper describes a post-layout simulation method using VHDL and C for verifying the architecture of antifuse-based FPGAs and the dedicated CAD system. An antifuse-based FPGA consists of programming circuitry including decoding logic, logic modules, segmented tracks, antifuses and I/O pads. The VHDL model which includes all these elements is used for logic verification and programming verification of the implemented circuit by reconstructing the logic circuit from the bit-stream generated from layout tool. The implemented circuit comprises of logic modules and routing networks. Since the routing delay of the complex networks is comparable to the delay of the logic module in the FPGA, the accurate post-layout simulation is essential to the FPGA system. In this paper, the C program calculates the delay of the routing netowrks using SPICE, elmore or horowitz delay models and the results feedback to the VHDL simulation. Critical path anc be found from this post-layout simulation results.

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신뢰성 있는 멀티스택 기반의 가상화된 데이터 동시공유 시스템의 구현 (An implementation of reliable data sharing multi-stack system in virtualized environment)

  • 한규종;전동운;김두현
    • 대한임베디드공학회논문지
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    • 제11권5호
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    • pp.259-265
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    • 2016
  • In this paper, we present an architecture for the fault isolation by applying virtualization-based multi-stack technologies. We propose the simultaneous sharing and switching mechanism using virtualied serial communications. Each guest OS has its own virtual serial device. The distribution module provides communications between the guest OS's through the virtual serial devices and simultaneously detect the liveness of the guest OS. The suggested mechanism has been implemented in VirtualBox and shows satisfactory performance in transmission speed and data sharing capability with virtual RS232.

와이어 컷 방전가공조건 데이터베이스 구축 및 상하이형상 가공 (Construction of a Database for Wire Cutting Electrodischarge Conditions and Variable taper Wire-cut Machining.)

  • 유우식;이규섭
    • 산업경영시스템학회지
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    • 제23권59호
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    • pp.119-127
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    • 2000
  • This paper describes the database for wire cutting electrodischarge conditions and variable taper wire-cut Machining. Electodischarge wire-cut machining is applicable to all materials that are fairly good electrical conductors, including metals, alloys, and most carbides. Thus it provides a relatively simple method for making holes of any desired cross section in materials that are too hard or brittle to be machined by most other methods. In conventional wire cutting CAM systems usually generate the NC code omitting electrodischarge conditions, so operator edits the NC code manually. But it is very inefficient. Therefore in this paper we propose a wire cutting CAM system including database for electrodischarge conditions. Proposed system consists of three steps: 1) Development of database for electrodischarge conditions 2) Development of CAM functions, Including 2D CAD modeling tools, file I/O functions, wire path genera tion functions and postprocessor. 3) Development of variable taper wire-cut machining module. The proposed system has been tested in the JinYoung precision Machine Co.,LTD. and found to be working satisfactorily.

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비휘발성 메로리를 이용한 빠르고 지속성 있는 저장장치 모듈 설계 및 구현 (Fast Durable Storage Module based on Non-Volatile Memory)

  • 정형원;이상엽;조광일;정형수
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2016년도 추계학술발표대회
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    • pp.12-15
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    • 2016
  • 데이터베이스 시스템의 트랜잭션 로깅이나 파일 시스템의 저널링에서 데이터 저장시 입출력 동기화(Synchronous I/O)는 올바른 프로르램 동작에 필수적이다. 하지만 입출력 동기화로 인한 프로그램의 지연 혹은 기다림은 응용 프로그램 성능의 저하를 가져온다. 본 논문에서는 차세대 저장장치인 비휘발성 메모리를 사용하여 지속성을 보장하며 쓰기 연산의 응답성을 개선하는 사용자 수준의 스토리지 모듈을 제안하고 기존의 동기화된 쓰기 연산과 성능을 비교하였다. 특히 멀티코어 환경에서 동시에 들어오는 여러 입출력 쓰기 연산 요청에 대하여 효율적으로 처리하였다.

기업간 정보 통신의 신기술 (New Techology of Intercompany Information Communication: Development of EDI System)

  • 최창원;김태윤
    • 경영과학
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    • 제10권1호
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    • pp.59-80
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    • 1993
  • Electronic data interchange (EDI) is a new technology of information communication which can make offices paperless. This study develop an EDI system to communicate informations among companies using computer systems. The system consists of five modules-document I/O, translation, system management, communication, and additional modules. The database of EDI documentation standards has been constructed by the table-driven method. The communication module provides three communication modes-RS232C, MODEM, and message handling system (MHS). The system performance has been improved by the method of data compression and data encryption which prevent the communication delay and illegal users. This EDI system can be used as a front-end, back-end, or stand-alone mode.

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NAND 플래시 메모리용 파일 시스템 계층에서 프로그램의 페이지 참조 패턴을 고려한 캐싱 및 선반입 정책 (Caching and Prefetching Policies Using Program Page Reference Patterns on a File System Layer for NAND Flash Memory)

  • 김경산;김성조
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.777-778
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    • 2006
  • In this thesis, we design and implement a Flash Cache Core Module (FCCM) which operates on the YAFFS NAND flash memory. The FCCM applies memory replacement policy and prefetching policy based on the page reference pattern of applications. Also, implement the Clean-First memory replacement technique considering the characteristics of flash memory. In this method the decision is made according to page hit to apply prefetched waiting area. The FCCM decrease I/O hit frequency up to 37%, Compared with the linux cache and prefetching policy. Also, it operated using less memory for prefetching(maximum 24% and average 16%) compared with the linux kernel.

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TMS320F28335 DSP를 이용한 화자독립 음성인식기 구현 (Implementation of a Speaker-independent Speech Recognizer Using the TMS320F28335 DSP)

  • 정익주
    • 산업기술연구
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    • 제29권A호
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    • pp.95-100
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    • 2009
  • In this paper, we implemented a speaker-independent speech recognizer using the TMS320F28335 DSP which is optimized for control applications. For this implementation, we used a small-sized commercial DSP module and developed a peripheral board including a codec, signal conditioning circuits and I/O interfaces. The speech signal digitized by the TLV320AIC23 codec is analyzed based on MFCC feature extraction methed and recognized using the continuous-density HMM. Thanks to the internal SRAM and flash memory on the TMS320F28335 DSP, we did not need any external memory devices. The internal flash memory contains ADPCM data for voice response as well as HMM data. Since the TMS320F28335 DSP is optimized for control applications, the recognizer may play a good role in the voice-activated control areas in aspect that it can integrate speech recognition capability and inherent control functions into the single DSP.

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비트 레벨 일차원 시스톨릭 모듈러 승산 (Bit-level 1-dimensional systolic modular multiplication)

  • 최성욱;우종호
    • 전자공학회논문지B
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    • 제33B권9호
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    • pp.62-69
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    • 1996
  • In this paper, the bit-level 1-dimensional systolic array for modular multiplication is designed. First of all, the parallel algorithm and data dependence graph from walter's method based on montgomery algorithm suitable for array design for modular multiplication is derived. By the systematic procedure for systolic array design, four 1-dimensional systolic arrays are obtained and then are evaluated by various criteria. As it is modified the array which is derived form [0,1] projection direction by adding a control logic and it is serialized the communication paths of data A, optimal 1-dimensional systolic array is designed. It has constant I/O channels for expansile module and it is easy for fault tolerance due to unidirectional paths. It is suitable for RSA cryptosystem which deals iwth the large size and many consecutive message blocks.

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단일 디스크 입출력을 위한 커널 모듈 프로토타입의 설계 및 구현 (Design and Implementation of the Kernel Module Prototype for the Single Disk I/O)

  • 황인철;김동환;김호진;맹승렬;조정완
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 2003년도 가을 학술발표논문집 Vol.30 No.2 (1)
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    • pp.406-408
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    • 2003
  • 요즘 값싼 PC를 빠른 네트웍으로 묶어 높은 성능을 얻고자하는 클러스터 컴퓨팅에 대한 연구가 활발히 이루어지고 있다. 이러한 연구 중 클러스터 컴퓨팅 환경을 구성하는 여러 컴퓨터들을 하나의 컴퓨터처럼 보이게 해주는 단일 시스템 이미지 서비스는 사용자에게 쓰기 편리한 환경과 높은 가용성을 제공하여 준다. 단일 시스템 이미지 서비스를 제공하기 위해서는 단일 프로세스 공간, 단일 메모리 공간 및 단일 디스크 입출력을 제공하여 주어야 한다. 단일 디스크 입출력은 여러 컴퓨터에 나누어져 있는 디스크들을 하나의 큰 디스크로 보여주고 여러 디스크들을 효율적으로 사용할 수 있도록 서비스를 제공한다. 이러한 단일 디스크 입출력을 사용자 수준이나 파일 시스템 수준에서 제공하여 주는 것은 성능 측면이나 투명성의 측면에서 커널 모듈로 제공하여 주는 것 보다 좋지 않다. 따라서 본 논문에서는 단일 디스크 입출력을 위하여 커널 모듈 프로토타입을 설계하고 구현한다. 그리고 네트웍 파일 시스템과 단일 디스크를 이용하여 단일 디스크 입출력을 위한 터널 모듈의 성능과 비교, 분석한다.

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