• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.50-56
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• 2009

SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. Fixed priority, round-robin, TDM arbitration are used in general arbitration method, In this study, we compose TLM algorithm and analyze general arbitration methods through TLM simulation. Consequently, we propose the hybrid bus arbitration policy and verify the performance, compared with the other arbitration methods.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.1
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• pp.253-258
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• 2014

In smartphone sensing which monitors various social phenomena of the individuals by using embedded sensors, managing metadata is one of the important issue to process large-scale data, improve the data quality, and share collected data. In this paper, we proposed a document clustering scheme for the large-scale metadata management architecture which is designed as a hybrid back-end consisting of a cluster head and member nodes to reduce the server-side overhead. we also verified that the proposed scheme is more efficient than the distance based clustering scheme in terms of the server-side overhead through simulation results.

• Journal of KIISE
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• v.43 no.2
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• pp.177-185
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• 2016

In this paper, we propose a hybrid write buffer architecture comprised of DRAM and NVRAM on SSD and a write buffer algorithm for the hybrid write buffer architecture. Unlike other write buffer algorithms, the proposed algorithm considers read pages as well as write pages to improve the performance of storage devices because most actual workloads are read-write mixed workloads. Through effectively managing NVRAM pages, the proposed algorithm extends the endurance of SSD by reducing the number of erase operations on NAND flash memory. Our experimental results show that our algorithm improved the buffer hit ratio by up to 116.51% and reduced the number of erase operations of NAND flash memory by up to 56.66%.

• Journal of IKEEE
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• v.22 no.4
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• pp.1147-1151
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• 2018

As personal users create and share lots of contents at any time and any places, new networking architecture such as content centric networking (CCN) has emerged. CCN utilizes content name as a packet identifier, not address. However, current CCN has a limitation for content source mobility management. The movement of content sources cause long delivery latency and long service disruption. To solve that, a hierarchical mobility management was was proposed. However, the hierarchical mobility management scheme has still the loss of interest packets and long handoff latency. So, this paper presents the hybrid hierarchical mobility management in mobile CCN environements to reduce both the loss rate of interest packets and the handoff latency. It is shown from the performance evaluations shows that the proposed scheme provides low loss rate of control message.

• Computers and Concrete
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• v.23 no.5
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• pp.335-349
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• 2019

A low-cycle loading experiment of 16 transfer column specimens was conducted to study the influence of parameters, likes the extension length of shape steel, the ratio of shape steel, the axial compression ratio and the volumetric ratio of stirrups, on the shear distribution between steel and concrete, the concrete damage state and the degradation of lateral stiffness. Shear force of shape steel reacted at the core area of concrete section and led to tension effect which accelerated the damage of concrete. At the same time, the damage of concrete diminished its shear capacity and resulted in the shear enlargement of shape steel. The interplay between concrete damage and shear force of shape steel ultimately made for the failures of transfer columns. With the increase of extension length, the lateral stiffness first increases and then decreases, but the stiffness degradation gets faster; With the increase of steel ratio, the lateral stiffness remains the same, but the degradation gets faster; With the increase of the axial compression ratio, the lateral stiffness increases, and the degradation is more significant. Using more stirrups can effectively restrain the development of cracks and increase the lateral stiffness at the yielding point. Also, a formula for calculating the yielding lateral stiffness is obtained by a regression analysis of the test data.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.5
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• pp.1778-1797
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• 2021

Document image binarization is an important pre-processing step in document analysis and archiving. The state-of-the-art models for document image binarization are variants of encoder-decoder architectures, such as FCN (fully convolutional network) and U-Net. Despite their success, they still suffer from three limitations: (1) reduced feature map resolution due to consecutive strided pooling or convolutions, (2) multiple scales of target objects, and (3) reduced localization accuracy due to the built-in invariance of deep convolutional neural networks (DCNNs). To overcome these three challenges, we propose an improved semantic segmentation model, referred to as DP-LinkNet, which adopts the D-LinkNet architecture as its backbone, with the proposed hybrid dilated convolution (HDC) and spatial pyramid pooling (SPP) modules between the encoder and the decoder. Extensive experiments are conducted on recent document image binarization competition (DIBCO) and handwritten document image binarization competition (H-DIBCO) benchmark datasets. Results show that our proposed DP-LinkNet outperforms other state-of-the-art techniques by a large margin. Our implementation and the pre-trained models are available at https://github.com/beargolden/DP-LinkNet.

• Steel and Composite Structures
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• v.49 no.6
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• pp.645-666
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• 2023

Due to the steadily declining supply of natural coarse aggregates, the concrete industry has shifted to substituting coarse aggregates generated from byproducts and industrial waste. Oil palm shell is a substantial waste product created during the production of palm oil (OPS). When considering the usage of OPSC, building engineers must consider its uniaxial compressive strength (UCS). Obtaining UCS is expensive and time-consuming, machine learning may help. This research established five innovative hybrid AI algorithms to predict UCS. Aquila optimizer (AO) is used with methods to discover optimum model parameters. Considered models are artificial neural network (AO - ANN), adaptive neuro-fuzzy inference system (AO - ANFIS), support vector regression (AO - SVR), random forest (AO - RF), and extreme gradient boosting (AO - XGB). To achieve this goal, a dataset of OPS-produced concrete specimens was compiled. The outputs depict that all five developed models have justifiable accuracy in UCS estimation process, showing the remarkable correlation between measured and estimated UCS and models' usefulness. All in all, findings depict that the proposed AO - XGB model performed more suitable than others in predicting UCS of OPSC (with R², RMSE, MAE, VAF and A_15-index at 0.9678, 1.4595, 1.1527, 97.6469, and 0.9077). The proposed model could be utilized in construction engineering to ensure enough mechanical workability of lightweight concrete and permit its safe usage for construction aims.

• Journal of Korea Multimedia Society
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• v.15 no.5
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• pp.651-663
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• 2012

Networked digital signage downloads necessary multimedia contents from a large-sized storage on WAN to its local disk of a limited size before starting their playback. If the required time to download the entire contents gets longer, a start time to play the contents at the digital signage could be delayed. In this paper, we propose a hybrid storage architecture that not only inserts an iSCSI storage layer between the existing local disk and the WAN storage, but offers a contents caching scheme in order to obtain all the necessary contents in digital signage rapidly. The proposed caching scheme determines how to place the downloaded contents both in the local disk and the iSCSI storage. Uniquely, the proposed caching scheme manages the iSCSI storage space by dividing it into two regions: (1) in one region, the digital signage can play the contents directly without downloading them into the local disk; (2) in the other region, the digital signage cannot. Performance evaluations on a simulator and an actual system with workloads of various contents show that a contents-downloading time of the hybrid storage architecture is at maximum three times shorter than that of the existing storage architecture.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1998.06a
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• pp.585-590
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• 1998

The purpose of this paper is to develop a neurofuzzy modeling & inference system which can determine principle dimensions and hull factors in an initial ship design. Neurofuzzy modeling & inference for a hull form design (NeFHull) applies the given input-output data to the fuzzy theory. NeFHull also deals the fuzzificated values with neural networks. NeFHull redefines normalized input-output data as membership functions and executes the fuzzficated information with backporpagation-neural -networks. A hybrid learning algorithms utilized in the training of neural networks and examining the usefulness of suggested method through mathematical and mechanical examples.

• ETRI Journal
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• v.30 no.3
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• pp.451-460
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• 2008

Recently, the power consumption of integrated circuits has been attracting increasing attention. Many techniques have been studied to improve the power efficiency of digital signal processing units such as fast Fourier transform (FFT) processors, which are popularly employed in both traditional research fields, such as satellite communications, and thriving consumer electronics, such as wireless communications. This paper presents solutions based on parallel architectures for high throughput and power efficient FFT cores. Different combinations of hybrid low-power techniques are exploited to reduce power consumption, such as multiplierless units which replace the complex multipliers in FFTs, low-power commutators based on an advanced interconnection, and parallel-pipelined architectures. A number of FFT cores are implemented and evaluated for their power/area performance. The results show that up to 38% and 55% power savings can be achieved by the proposed pipelined FFTs and parallel-pipelined FFTs respectively, compared to the conventional pipelined FFT processor architectures.