• 제목/요약/키워드: Hold Circuit

검색결과 108건 처리시간 0.024초

PWM 전류형인버터를 이용한 계통연계형 태양광 발전시스템 (Utility Interactive Photovoltaic Generation System using PWM Current Source Inverter)

  • 박춘우;성낙규;이승환;강승욱;이훈구;한경희
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1996년도 창립기념 전력전자학술발표회 논문집
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    • pp.109-112
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    • 1996
  • In this paper, we composed utility interactive photovoltaic generation system of current source inverter, and controlled that low harmonic and high power factor are hold by supposing control and compensation method which is concerned with synchronous signal distortion and modulation delay. And we put parallel resonant circuit into dc link, so, magnitude of direct reactance was reduce by restraining direct current pulsation which had accumulation of pulsating power in alternating electrolytic condenser. Also we controlled that modulation factor is operated around maximum output of solar cell.

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초음파를 이용한 게임 운영 도구 개발에 관한 연구 (Study About The Game Operation Tool Development that Used A Ultrasonic)

  • 배재환
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.741-742
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    • 2006
  • In this paper, we suggested a method for game operation tools by Ultrasonic sensor. Various ideas are necessary for the development that a game is industrial. I use a Ultrasonic sensor in this study and use a model case, and an operation is going to hold a case shooting play. Therefore, I showed a former circuit and a formula related to this.

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저전력 2-Step 8-bit 10-MHz CMOS A/D 변환기 (A Low-Power 2-Step 8-bit 10-MHz CMOS A/D Converter)

  • 박창선;손주호;김영랄;김동용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.201-204
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    • 2000
  • In this paper, an A/D converter is implemented to obtain 8bit resolution at a conversion rate of 10Msample/s. This architecture is proposed using the 2-step architecture for high speed conversion rate. It is consisted of sample/hold circuit, low power comparator, voltage reference circuit and DAC of binary weighted capacitor array. Proposed A/D converter is designed using 0.2$\mu\textrm{m}$ CMOS technology. The SNR is 45.3dB at a sampling rate of 10MHz with 1.95MHz sine input signal. When an 8bit 10Msample/s A/D converter is simulated, the Differential Nonlinearity / Integral Nonlinearity (DNL/ INL) error are ${\pm}$1 / ${\pm}$2 LSB, respectively. The power consumption is 13㎽ at single +2.5V supply voltage.

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Minimization of Rising and Falling Times of A Boost Type Converter Output Voltage in Pulsed Mode Operation

  • Nho Eui-Cheol;Kim In-Dong;Joe Cheol-Je;Chun Tae-Won;Kim Heung-Geun
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.286-290
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    • 2001
  • This paper describes an improved short-circuit protection method with a boost type rectifier using a multilevel ac/dc power converter. The output dc power of the proposed converter can be disconnected from the load within several hundred microseconds at the instant of short-circuit fault. Once the fault has been cleared the dc power is reapplied to the load. The rising time of the dc load voltage is as small as several hundred microseconds, and there is no overshoot of the dc voltage because the dc output capacitors hold undischarged state. The converter, which employs the proposed method, has the characteristics of a simplified structure, reduced cost, weight, and volume compared with a conventional power supply, which has frequent output short-circuits. Experimental results are presented to verify the usefulness of the proposed converter.

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A Novel Data Driver for Passive Matrix Organic Light-emitting Devices with High Gray Scale Images utilizing a High Uniform Current

  • Shin, Hong-Jae;Kwack, Kae-Dal;Kim, Tae-Whan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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    • pp.1398-1400
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    • 2005
  • A novel data driver for passive matrix organic lightemitting devices (PM-OLEDs) with high gray scale images was designed. The proposed circuit consisted of a main current bias circuit as well as sample & hold circuits in each channel of the data driver to compensate a current offset. These results indicate that a data driver designed by using the current offset compensation technique holds promise for poten tial applications in PM-OLED displays with high gray scale images.

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8-bit 10-MHz CMOS A/D 변환기 (A 8-bit 10-MHz CMOS A/D Converter)

  • 박창선;손주호;이준호;김종민;김동용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.263-266
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    • 1999
  • In this work, a A/D converter is implemented to obtain 8bit resolution at a conversion rate of 10MS/s for video applications. This architecture is proposed using the Pipelined architecture for high speed conversion rate and the Successive - Approximation architecture for low power consumption, and consists of two identical stages that consist of sample/hold circuit, low power comparator, voltage reference circuit and MDAC of binary weighted capacitor array. Proposed A/D converter is designed using 0.25${\mu}{\textrm}{m}$ CMOS technology The SNR is 80㏈ at a sampling rate of 10MHz with 1.95MHz sine input signal. When an 8bit 10MS/s A/D converter is simulated, the Differential Nonlinearity / Integral Nonlinearity (DNL/ INL) error are $\pm$0.5 / $\pm$2 LSB, respectively. The power consumption is 13㎽ at 10MS/s.

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Trigged Spark Gap의 고전압 방전제어특성 연구 (Characteristics of High Voltage Discharge using Triggered Spark Gap)

  • 손윤규;김광기;박상욱;조무현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 E
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    • pp.1816-1818
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    • 1997
  • A triggered sparkp gap switch was fabricater and its high-voltage discharge characteristics were studied. The switch is composed of two main electrodes and one trigger electrode which is placed perpendicular to the main one. Spark gap distance was fixed by 25 mm. This device has been operated without self firing at the pulse repetition frequency from 1 to 20 Hz limited by the charging current, and the hold-off voltage from 10 to 30kV. An IGBT switch and igniter coil (originally used in a car) were adopted for a trigger circuit. In this article preliminary switch characteristics of the spark gap switch are reported with the emphasis on the description of the trigger circuit.

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저전압용 CMOS 연산 증폭기를 위한 전력 최소화 기법 및 그 응용 (A power-reduction technique and its application for a low-voltage CMOS operational amplifier)

  • 장동영;이용미;이승훈
    • 전자공학회논문지C
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    • 제34C권6호
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    • pp.37-43
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    • 1997
  • In this paper, an analog-domain powr-reduction technique for a low-voltage CMOS operational amplifier and its application to clock-based VLSI systems are proposed. The proposed technique cuts off the bias current of the op amp during a half cycle of the clock in the sleeping mode and resumes the curent supply sequentially during the remaining cycle of the clock in the normal operating mode. The proposed sequential sbiasing technique reduces about 50% of the op amp power and improves the circuit performance through high phase margin and stable settling behavior of the output voltage. The power-reduction technique is applied to a sample-and-hold amplifier which is one of the critical circuit blocks used in the front-end stage of analog and/or digital integrated systems. The SHA was simulated and analyzed in a 0.8.mu.m n-well double-poly double-metal CMOS technology.

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전자기유도방식의 에너지 하베스팅을 이용한 자가발전 무선 비상호출기 구현 연구 (Feasibility study for the self powered wireless emergency call button using electromagnetic energy harvesting mechanism)

  • 김일중;최연석
    • 대한안전경영과학회지
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    • 제16권2호
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    • pp.111-119
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    • 2014
  • This paper describes the design and implementation of a electromagnetic energy harvesting mechanism and electronic circuit for autonomous emergency call system. This analysis results show the power output of the proposed harvesting mechanism and circuit up to max power output 5V and it can hold up to 65 msec of the power generation and 10msec of the RF transmission. Based on the these testing results, the implementation of autonomous emergency call device without battery power or any external power source is feasible.

부분방전 분석장치의 설계 및 제작 (Design and Fabrication of a Partial Discharge Analyzer)

  • 송재용;문승보;차명수;길경석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1517-1518
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    • 2006
  • This paper describes the design and fabrication of a partial discharge(PD) analyzer to evaluate insulation performance for low-voltage electrical and electronic devices. The analyzer consists of an adjustable AC power supply, a coupling network, an amplifier, a shielding encloser, a sample-hold (S/H) circuit and a data acquisition (DAQ) board. The analyzer holds the height of PD pulse for $10{\mu}s$ by the S/H circuit, and this makes possible to measure PD pulses having fast rise and short duration by a low speed analog-to-digital (A/D) converter. The data are transmitted to the personal computer through the DAQ board, and the designed analysis program calculate apparent charges, discharge inception and extinction voltages.

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