• 한국철도학회:학술대회논문집
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• 한국철도학회 2009년도 춘계학술대회 논문집 특별세미나,특별/일반세션
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• pp.623-628
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• 2009

There is an increasing demand for efficient high power/weight auxiliary power supplies for use on high speed traction application. Many new conversion techniques have been proposed to reduce the voltage and current stress of switching components, and the switching losses in the traditional pulse width modulation(PWM) converter. Especially, the phase shift full bridge zero voltage switching PWM techniques are thought most desirable for many applications because this topology permits all switching devices to operate under zero voltage switching(ZVS) by using circuit parasitic components such as leakage inductance of high frequency transformer and power device junction capacitance. The proposed topology is found to have higher efficiency than conventional soft-switching converter. Also it is easily applicable to phase shift full bridge converter by applying an energy recovery snubber consisted of fast recovery diodes and capacitors.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 추계학술대회 논문집
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• pp.321-324
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• 2008

Recently, there is an increasing demand for efficient high power/weight auxiliary power supplies for use on high speed traction application. many new conversion techniques have been proposed to reduce the voltage and current stress of switching components, and the switching losses in the traditional pulse width modulation(PWM) converter. Among them, the phase shift full bridge zero voltage switching PWM techniques are thought most desirable for many applications because this topology permits all switching devices to operate under zero voltage switching(ZVS) by using circuit parasitic components such as leakage inductance of high frequency transformer and power device junction capacitance. The proposed topology is found to have higher efficiency than conventional soft-switching converter. Also it is easily applicable to phase shift full bridge converter by applying an energy recovery snubber consisted of fast recovery diodes and capacitors.

• 한국멀티미디어학회논문지
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• 제19권2호
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• pp.352-359
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• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• 전기전자학회논문지
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• 제14권2호
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• pp.90-97
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• 2010

본 논문에서는 DT-CMOS(Dynamic Threshold voltage CMOS) 스위칭 소자와 DTMOS Error Amplifier를 사용한 고 효율 전원 제어 장치(PMIC)를 제안하였다. 높은 출력 전류에서 고 전력 효율을 얻기 위하여 PWM(Pulse Width Modulation) 제어 방식을 사용하여 PMIC를 구현하였으며, 낮은 온 저항을 갖는 DT-CMOS를 설계하여 도통 손실을 감소시켰다. 벅 컨버터(Buck converter) 제어 회로는 PWM 제어회로로 되어 있으며, 삼각파 발생기, 밴드갭 기준 전압 회로, DT-CMOS 오차 증폭기, 비교기가 하나의 블록으로 구성되어 있다. 제안된 DT-CMOS 오차증폭기는 72dB DC gain과 83.5위상 여유를 갖도록 설계하였다. DTMOS를 사용한 오차증폭기는 CMOS를 사용한 오차증폭기 보다 약 30%정도 파워 소비 감소를 보였다. Voltage-mode PWM 제어 회로와 낮은 온 저항을 스위칭 소자로 사용하여 구현한 DC-DC converter는 100mA 출력 전류에서 95%의 효율을 구현하였으며, 1mA이하의 대기모드에서도 높은 효율을 구현하기 위하여 LDO를 설계하였다.

• Journal of Power Electronics
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• 제16권6호
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• pp.2024-2034
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• 2016

This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 춘계학술대회 논문집
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• pp.627-633
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• 2011

DC/DC switching power converters are commonly used to generate a regulated DC output voltages with high efficiencies from different DC input sources. The voltage mode DC/DC converter utilizes MOSFET, inductor, and a PWM (pulse-width modulation) controller with oscillator, amplifier, and comparator, etc. to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter and a buck converter containing a switched-mode power supply are studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by program of SPICE. In addition, power efficiency is analyzed based on the specification of each component.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1010-1011
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• 2008

본 연구는 도금용 정류기의 성능개선 및 부피저감을 위해 PWM 방식의 정류기 구성에 관한 것이다. 제안된 PWM(Pulse- width modulation) 정류기는 기존의 SCR 정류기에 비하여 전류제어기의 속응성을 개선 할 수 있었으며, 그 사이즈 면에서 기존방식에 비하여 대폭감소할 수 있었다. 또한 출력전압 15[V], 출력전류 1,000[A]인 15[Kw]급 PWM정류기 프로토타입을 제작 및 실험을 통하여 그 타당성을 입증하였다.

• 전기전자학회논문지
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• 제13권2호
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• pp.208-215
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• 2009

본 논문에서는 DT-CMOS(Dynamic Threshold voltage CMOS) 스위칭 소자를 사용한 모바일 기기용 고 효율 전원 제어 장치(PMIC)를 제안하였다. 휴대기기에서 필요한 높은 출력 전압과 낮은 출력 전압을 제공하기 위하여, 부스트 변환기(Boost Converter)와 벅 변환기(Buck Converter)를 원칩(One-chip)으로 구현하였다. 그리고 높은 출력 전류에서 고 전력 효율을 얻기 위하여 PWM(Pulse Width Modulation) 제어 방식을 사용하여 PMIC를 구현하였으며, 낮은 온 저항을 갖는 DT-CMOS를 설계하여 도통 손실을 감소시켰다. Voltage-mode PWM 제어 회로와 낮은 온 저항 스위칭 소자를 사용하여 구현한 부스트 변환기와 벅 변환기는 100mA 출력 전류에서 92.1%와 95%의 효율을 구현하였으며, 1mA이하의 대기모드에서도 높은 효율을 구현하기 위하여 LDO를 설계하였다.

• Journal of Electrical Engineering and Technology
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• 제5권3호
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• pp.477-483
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• 2010

This paper is studied on a novel buck-boost isolated converter for high efficiency and high power factor. The switching devices in the proposed converter are operated by soft switching technique using a new quasi-resonant circuit, and are driven with discontinuous conduction mode (DCM) according to pulse width modulation (PWM). The quasi-resonant circuit makes use of a step up-down inductor and a loss-less snubber capacitor. The proposed converter with DCM also simplifies the requirement of control circuit and reduces a number of control components. The input ac current waveform in the proposed converter becomes a quasi sinusoidal waveform in proportion to the magnitude of input ac voltage under constant switching frequency. As a result, it is obtained by the proposed converter that the switching power losses are low, the efficiency of the converter is high, and the input power factor is nearly unity. The validity of analytical results is confirmed by some simulation results on computer and experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.1169-1171
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• 2003

This paper presents a 1.6[kW]class single phase high power factor(HPF) pulse width modulation(PWM) boost rectifier featuring soft commutation of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing insulated gate bipolar transistors(IGBT'S). The principle of operation, the theoretical analysis, a design example, and experimental results from laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current Total Harmonic Distortion(THD) equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.