• Title/Summary/Keyword: High-Speed Data Transmission

Search Result 600, Processing Time 0.029 seconds

A Study on the Optical Modem for Data Link Realization (데이타 링크 구성을 위한 광 모뎀에 관한 연구)

  • 유태훈;은재정;박한규
    • Proceedings of the Korean Institute of Communication Sciences Conference
    • /
    • 1986.10a
    • /
    • pp.198-200
    • /
    • 1986
  • In this paper, the optical modem for data link realization is designed with the advantages of optical fiber : large handwidth, no electromagnetic interference, high speed and long-haul communications. Biphase cording format is used for the sync, and async, transmissions. Modem interface conform to the CCITT V.24 standard for the compatibility with existing systems. 0/E and E/0 converters are designed using LED-APD pair for long wave length and LD-APD for short wave length, respectively. As a result, the system is capable of transmitting at any bps within dc to 200Kbps in async, and at 1200bps up to 57.6Kbps in sync. transmission.

  • PDF

Analog Adaptive Pulse shaping and Line Equalizer For 400Mb/s data rate on 50m STP Cable

  • Lee, Hoon;Kwisung Yoo;Gunhee Han
    • Proceedings of the IEEK Conference
    • /
    • 2003.07b
    • /
    • pp.887-890
    • /
    • 2003
  • High Speed data transmission over a long length of cable is limited due to the limited bandwidth of a cable which introduces ISI(Inter Symbol Interference). In order to compensate for the loss and phase dispersion in the cable, a pulse shaping in a transmitter and a line equalizer in receiver can be used. This paper presents a low-power and small-ana analog adaptive pulse shaping circuit and line equalizer, The design was fabricated in a 0.25${\mu}{\textrm}{m}$ mixed-signal CMOS process. The proposed pulse shaping circuit and equalizer operate at 400Mb/s on 50m STP(Shielded Twisted Pair) cable. It consumes 28.5${\mu}{\textrm}{m}$ with a 2.5-V power supply and occupies only 0.098 $\textrm{mm}^2$.

  • PDF

MultiRing An Efficient Hardware Accelerator for Design Rule Checking (멀티링 설계규칙검사를 위한 효과적인 하드웨어 가속기)

  • 노길수;경종민
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.24 no.6
    • /
    • pp.1040-1048
    • /
    • 1987
  • We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

  • PDF

A Study on the Performance Improvement of TCP using ABR/UBR Services (ABR/UBR 서비스를 이용한 TCP 성능개선에 관한 연구)

  • 김명희;박봉주;박승섭
    • Journal of Korea Multimedia Society
    • /
    • v.3 no.6
    • /
    • pp.643-651
    • /
    • 2000
  • ATM network technology is generally used for the integration of multimedia services in high-speed Internet. ABR (Available Bit Rate) and UBR (Unspecified Bit Rate) service classes have been developed specifically to support data application. In this paper, through the result of simulation, we analyzed the effect of TCP data transmission performance by using FRR (Fast Retransmission and Recovery) and Nagle's Algorithm on the UBR service, and by adjusting EFCI switch parameter on the ABR service. As a result of our study, performance improvement of TCP over ATM network is observed by adjusting TCP parameters and setting of effective switch parameter.

  • PDF

Design of high-speed block transmission technology for real-time data duplication (실시간 데이터 이중화를 위한 고속 블록 전송기술 설계)

  • Han, JaeSeung;An, Jae-Hoon;Kim, Young-Hwan;Park, Chang-Won
    • Proceedings of the Korean Society of Computer Information Conference
    • /
    • 2018.07a
    • /
    • pp.445-448
    • /
    • 2018
  • 본 논문에서는 데이터 이중화 저장시스템의 장애발생으로 인한 백업서버 데이터 손실을 보호하기 위해 무 손실 실시간 데이터 이중화 시스템 설계방안을 제안한다. 이는 원본서버의 데이터와 백업서버의 데이터가 특정 시점 T에서 100% 일치하지 않는 비동기 방식을 동기방식으로 해결하기 위한 시스템 설계 제안으로, 원본서버의 데이터 생성과 동시에 실시간 데이터 백업을 목적으로 한다. 이를 위해 전송단계에서 필요한 가장 빠른 압축인 LZ4 압축 알고리즘을 기반으로 Intel AVX 명령어를 사용하여 보다 압축속도를 증진시켜 실시간 시스템을 구축한다. 또한 전송 중 보안위협으로부터 보호하기 위해 Key 전달 기법과 AES 암호화 알고리즘에 대해 기술한다.

  • PDF

Engineering Test Satellite, KITSAT-3, Program (저궤도 기술시험용 소형위성 우리별 3호 개발)

  • Park, Sung-Dong;Kim, Sung-Heon;Sung, Dan-Keun;Choi, Soon-Dal
    • Proceedings of the KIEE Conference
    • /
    • 1995.07b
    • /
    • pp.907-909
    • /
    • 1995
  • The SaTReC is to develop, deploy, and operate a low Earth orbiting small satellite system, KITSAT-3, carrying a remote sensing payload, a space science payload, and a data collection system. Through the development of KITSAT-3, the SaTReC is to demonstrate the small satellite system which provides highly accurate attitude control, high speed data transmission, and a unique spacecraft configuration and to provide educational opportunities to Korean space industries and research institute. The KITSAT-3 is expected to be launched in the beginning of 1997 by Chinese Long March IV as a secondary payload into about 800 km's sunsynchronous orbit.

  • PDF

Design of Synchronous Network System based on SDH (SDH 기반의 동기식 네트워크 시스템 구현)

  • Kim, Jeong-Dong;Kwon, J.;Choi, T.;Huh, W.;Kim, J.
    • Proceedings of the IEEK Conference
    • /
    • 2002.06a
    • /
    • pp.417-420
    • /
    • 2002
  • In this paper, we implemented a SDH synchronous network system based on ITU-T recommendation G.707 - Network node interface for the synchronous digital archy(SDH). For the system, we used signal processing SDH ASIC, and designed a FPGA_Control chip for various signal control and a FPGA_Alignment cllip for data alignment using YHDL(Very high speed integrated circuit Hardware Description Language). For system monitoring, an operation system was developed using ANSI C and executed in CPU (Motorola MPC-860). The system was evaluated by using ANT-20 for data transmission error defection, jitter detection, pointer chocking, and overhead determination.

  • PDF

Data Transfer Efficiency Analysis Considering Mobility in WiBro System (WiBro 시스템에서 이동성을 고려한 데이터 전송효율 분석)

  • Lim Seog-Ku
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.6 no.5
    • /
    • pp.446-452
    • /
    • 2005
  • As the name means, the WiBro is mobile service so that radio internet connection may be possible with high transmission speed using various terminal. Because WiBro is choosing suitable All-lP network architecture in internet service offer, structure of network is simple and the various supplementary service offer is available. This paper presented mobility model of terminal and proposed efficient way to improve existent way that transfer efficiency drops by data padding and analyze the performance by simulation.

  • PDF

Equivalent circuit models of WGPD and Submodule for 40-Gbps optical receivers (40-Gbps 급 광수신기를 위한 WGPD 서브모듈의 모델링)

  • Jeon, Su-Chang;Joo, Han-Sung;Lee, Bong-Yong;Yun, Il-Gu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2004.07a
    • /
    • pp.154-157
    • /
    • 2004
  • With the need of high-speed and mass data transmission, optical communication system requires the growth of optical components. Waveguide photodiodes(WGPDs) are introduced and circuit models of WGPD and submodule are required for the optical receiver application. In this paper, the circuit models of WGPD and submodule are investigated and modeling results are derived by PEEC methodology. The s-parameters are measured for the test structures of WGPD and submodule and the equivalent circuit models are examined. The modeling results agreed well with the measured data and can present a reasonable physical representation.

  • PDF

Bridging the Connectivity Gap Within a PLC-Wi-Fi Hybrid Networks

  • Shafi Ullah Khan;Taewoong Hwang;In-Soo Koo
    • International Journal of Advanced Culture Technology
    • /
    • v.11 no.1
    • /
    • pp.395-402
    • /
    • 2023
  • The implementation of a hybrid network utilizing Power Line Communication (PLC) and Wi-Fi technologies has been demonstrated to improve signal strength and coverage in areas with poor connectivity due to internet shadow areas. In this study we strategically positioned Wi-Fi relays and utilized the capabilities of PLC technology to significantly improve signal strength and coverage in areas with poor connectivity. We also analyzed the effects of metallic obstacles on Wi-Fi signal propagation and proposed a solution to strengthen the signal enough to pass through them. Our experiment demonstrated the feasibility and potential of using this hybrid network in industrial scenarios for real-time data transmission. Overall, the results suggest that the use of PLC and Wi-Fi hybrid networks can be a cost-effective and efficient solution for overcoming internet connectivity challenges and has the potential to provide high-speed internet access to areas with unreliable signals.