• Proceedings of the KSR Conference
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• 1998.05a
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• pp.442-449
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• 1998

Since it is essential for traction motors to reduce size and weight to achieve given traction effort, they need high input voltage. But the lack of input voltage occurs periodically due to the characteristics of train system. Therefore traction inverters use over-modulation PWM to maximize inverter's voltage gain. On the other hand, IGBT inverters can use higher frequency twice than GTO ones, which resulted in the need for novel optimal synchronous PWM strategy. This paper suggests that linearly-compensated overmodulation/optimal synchronous PWM strategy and also the simulation results of the method for a real traction motor-intertia model are presented.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.98-100
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• 2007

This paper proposes a robust digital controller for PWM voltage source inverter using CRA method. The usual inverter controller for the operation of constant voltage and constant frequency consists of a double looped PI controller for the outer voltage controller and the inner current controller, of which the order of characteristic polynomial is high and so the gain tuning is difficult. Considering the limited switching frequency of the devices and sampling frequency of the digital controller, the gain tuning is usually based on the engineering experiences with the try and error method. In this paper, the error-space approach is used to get the system model including the controller with low order, and the characteristic ratio assignment (CRA) method is proposed for the design of robust controller which has the advantage to design the optimal gain to meet the referenced response and overshoot within the limit range. The PSiM simulation and experience results are shown to verify the validity of the proposed controller.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.2
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• pp.114-121
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• 2011

This paper proposes a soft-switching interleaved boost converter which is suitable for high step-up and high power applications. Compared to the conventional boost converter the proposed converter can achieve approximately doubled voltage gain using the same duty cycle. The voltage ratings of the switch and diode are reduced to half, which result in the use of devices with lower $R_{DS(ON)}$ and on drop leading to reduced conduction losses. Also, voltage ratings of the passive components are reduced, and therefore the total energy volume is reduced to half. Further, the switch is turned on with ZVS in the CCM operation, and the diode is turned off with ZCS which results in negligible surge caused by diode reverse recovery leading to reduced switching losses. The validity of the proposed converter is proved through a 2kW prototype.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.9
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• pp.743-749
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• 2002

A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.8
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• pp.867-880
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• 1992

In this paper, a circuit design techniques for Improving the voltage gain of the GaAs MESFET single amplifier is presented. Also, various types of existing current mirror and proposed current mirror of new configuration are compared. To obtain the high differential mode gain and low common mode gain, bootstrap gain enhancement technique Is used and common mode feedback Is employed In the design of differential amplifier. The simulation results show that designed differential amplifier has differential gain of 57.66dB, unity gain frequency of 23.25GHz. Also, differential amplifier using common mode feedback with alternative negative current mirror has CMRR of 83.S8dB, stew rate of 3500 V /\ulcorners.

• Journal of Power Electronics
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• v.17 no.3
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• pp.590-600
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• 2017

This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.

• ETRI Journal
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• v.41 no.3
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• pp.383-395
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• 2019

Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high-speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS keeper transistor controlled by the clock and foot node voltage. This control mechanism offers abrupt conditional control of the keeper circuit and reduces the contention current, leading to high-speed performance. The keeper transistor arrangement also reduces the loop gain associated with the feedback circuitry. Hence, the circuits offer less delay variability. The design and simulation of various wide fan-in designs using 180 nm CMOS technology validates the proposed CCDD_1 and CCDD_2 designs, offering an increased speed performance of 7.2% and 8.5%, respectively, over a conventional domino logic structure. The noise gain margin analysis proves good robustness of the CCDD structures when compared with a conventional domino logic circuit configuration. A Monte Carlo simulation for 2,000 runs under statistical process variations demonstrates that the proposed CCDD circuits offer a significantly reduced delay variability factor.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.10
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• pp.4745-4750
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• 2012

In this paper a $6^{th}$ 1MHz~30MHz bandpass filter for Power line communication(PLC) modem receiver is designed using current mode synthesis method which is good to design the low-voltage and low-power filter. The designed bandpass filter is composed of cascade connecting between $3^{rd}$ Butterworth highpass filter and $3^{rd}$ Chebychev lowpass filter. As a core circuit in the current-mode filter, a current-mode integrator is designed with new architecture which can improve gain and unity gain frequency of the integrator. The gain and the unity gain frequency of the designed integrator is each 32.2dB and 247MHz. And the cutoff frequency of the designed $6^{th}$ bandpass filter can be controlled to 50MHz from 200KHz according to controlling voltage and the power consumption is 2.85mW with supply voltage, 1.8V. The designed bandpass filter was verified using a $0.18{\mu}m$ CMOS parameter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.1
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• pp.33-39
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• 2005

Comparing with the conventional transformer without the air gap, a contactless transformer with the large air gap between the long primary winding and the secondary winding has increased leakage inductance and reduced magnetizing inductance. For transferring the primary power to the secondary one, the high frequency series resonant converter has been widely used for the contactless power supply system with the large air gap and the increased leakage inductance of the contactless transformer However, the high frequency series resonant converter has the disadvantages of the low efficiency and high voltage gain characteristics in the overall load range due to the large air gap and the circulating magnetizing current. In this paper, the characteristics of the high efficiency and unit voltage gain are revealed in the proposed three-level series-parallel resonant converter. The results are verified on the simulation based on the theoretical analysis and the 5kW experimental prototype.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.2
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• pp.221-226
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• 2012

In this paper, wideband two-stage amplification stage was designed, fabricated and evaluated. The proposed amplification stage with a novel gain control method have a high gain, low noise and high linearity performance. It is consisted of common emitter amplifier as the first stage, cascode gain control amplifier as second stage and power detector which sense the received signal strength. The proposed amplification stage shows a total gain of 29 dB~37 dB, noise fiugre of 1.5 dB at operating band and high linearity performance as the IMD (third intermodulation distortion) level is below the noise level of the measurement equipment at the control voltage 2.0 V generated from power detector under the strong electric field condition.