• Title/Summary/Keyword: High mobility TFT

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Improved Contact property in low temperature process via Ultrathin Al2O3 layer (Al2O3 층을 이용한 저온공정에서의 산화물 기반 트랜지스터 컨택 특성 향상)

  • Jeong, Seong-Hyeon;Sin, Dae-Yeong;Jo, Hyeong-Gyun
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.55-55
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    • 2018
  • Recently, amorphous oxides such as InGaZnO (IGZO) and InZnO (IZO) as a channel layer of an oxide TFT have been attracted by advantages such as high mobility, good uniformity, and high transparency. In order to apply such an amorphous oxide TFTs to a display, the stability in various environments must be ensured. In the InGaZnO which has been studied in the past, Ga elements act as a suppressor of oxygen vacancy and result in a decreased mobility at the same time. Previous studies have been showed that the InZnO, which does not contain Ga, can achieve high mobility, but has relatively poor stability under various instability environments. In this study, the TFTs using $IZO/Al_2O_3$ double layer structure were studied. The introduction of an $Al_2O_3$ interlayer between source/drain and channel causes superior electrical characteristics and electrical stability as well as reduced contact resistance with optimally perfect ohmic contact. For the IZO and $Al_2O_3$ bilayer structures, the IZO 30nm IZO channels were prepared at $Ar:O_2=30:1$ by sputtering and the $Al_2O_3$ interlayer were depostied with various thickness by ALD at $150^{\circ}C$. The optimal sample exhibits considerably good TFT performance with $V_{th}$ of -3.3V and field effect mobility of $19.25cm^2/Vs$, and reduced $V_{th}$ shift under positive bias stress stability, compared to conventional IZO TFT. The enhanced TFT performances are closely related to the nice ohmic contact properties coming from the defect passivation of the IZO surface inducing charge traps, and we will provide the detail mechanism and model via electrical analysis and transmission line method.

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AMOLED Pixel Circuit with Electronic Compensation for Vth and Mobility Variation in LTPS TFTs (LTPS TFT의 Vth와 mobility 편차를 보상하기 위한 AMOLED 화소 회로)

  • Woo, Doo-Hyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.45-52
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    • 2009
  • We proposed a new pixel circuit and driving method for the large-area, high-luminance AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but stable characteristic. To improve the uniformity of an image, the threshold voltage($V_{TH}$) and the mobility of the TFTs can be compensated together. The proposed method overcomes the previous methods for mobility compensation, and that is profitable for large-area applications. Black data insertion was introduced to improve the characteristics for moving images. AMOLED panel can operate in two compensation mode, so the luminance degradation by mobility compensation can be released. The scan driver for controlling the pixel circuits were optimized, and the compensation mode can be controlled simply by that. Final driving signal has large timing margin, and the panel operates stably. The pixel circuit was designed for 14.1" WXGA top-emission ANGLED panel. The non-uniformity of the designed panel was estimated under 5% for the mobility compensation time of 1us.

Design of Mini-LVDS Output Buffer using Low-Temperature Poly-Silicon (LTPS) thin-film transistor (TFT)

  • Nam, Young-Jin;Min, Kyung-Youl;Yoo, Chang-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.685-688
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    • 2008
  • Mini-LVDS has been widely used for high speed data transmission because it provides low EMI and high bandwidth for display driver. In this paper, a Mini-LVDS output buffer with LTPS TFT process is presented which provides sufficient performance in the presence of large variation in the threshold voltage and mobility and kink effect.

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Effects of multi-layered active layers on solution-processed InZnO TFTs

  • Choi, Won Seok;Jung, Byung Jun;Kwon, Myoung Seok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.204.1-204.1
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    • 2015
  • We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

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High Mobility Thin-Film Transistors using amorphous IGZO-SnO2 Stacked Channel Layers

  • Lee, Gi-Yong;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.258-258
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    • 2016
  • 최근 디스플레이 산업의 발전에 따라 고성능 디스플레이가 요구되며, 디스플레이의 백플레인 (backplane) TFT (thin film transistor) 구동속도를 증가시키기 위한 연구가 활발히 진행되고 있다. 트랜지스터의 구동속도를 증가시키기 위해 높은 이동도는 중요한 요소 중 하나이다. 그러나, 기존 백플레인 TFT에 주로 사용된 amorphous silicon (a-Si)은 대면적화가 용이하며 가격이 저렴하지만, 이동도가 낮다는 (< $1cm2/V{\cdot}s$) 단점이 있다. 따라서 전기적 특성이 우수한 산화물 반도체가 기존의 a-Si의 대체 물질로써 각광받고 있다. 산화물 반도체는 비정질 상태임에도 불구하고 a-Si에 비해 이동도 (> $10cm2/V{\cdot}s$)가 높고, 가시광 영역에서 투명하며 저온에서 공정이 가능하다는 장점이 있다. 하지만, 차세대 디스플레이 백플레인에서는 더 높은 이동도 (> $30cm2/V{\cdot}s$)를 가지는 TFT가 요구된다. 따라서, 본 연구에서는 차세대 디스플레이에서 요구되는 높은 이동도를 갖는 TFT를 제작하기 위하여, amorphous In-Ga-Zn-O (a-IGZO) 채널하부에 화학적으로 안정하고 전도성이 뛰어난 SnO2 채널을 얇게 형성하여 TFT를 제작하였다. 표준 RCA 세정을 통하여 p-type Si 기판을 세정한 후, 열산화 공정을 거쳐서 두께 100 nm의 SiO2 게이트 절연막을 형성하였다. 본 연구에서 제안된 적층된 채널을 형성하기 위하여 5 nm 두계의 SnO2 층을 RF 스퍼터를 이용하여 증착하였으며, 순차적으로 a-IGZO 층을 65 nm의 두께로 증착하였다. 그 후, 소스/드레인 영역은 e-beam evaporator를 이용하여 Ti와 Al을 각각 5 nm와 120 nm의 두께로 증착하였다. 후속 열처리는 퍼니스로 N2 분위기에서 $600^{\circ}C$의 온도로 30 분 동안 실시하였다. 제작된 소자에 대하여 TFT의 전달 및 출력 특성을 비교한 결과, SnO2 층을 형성한 TFT에서 더 뛰어난 전달 및 출력 특성을 나타내었으며 이동도는 $8.7cm2/V{\cdot}s$에서 $70cm2/V{\cdot}s$로 크게 향상되는 것을 확인하였다. 결과적으로, 채널층 하부에 SnO2 층을 형성하는 방법은 추후 높은 이동도를 요구하는 디스플레이 백플레인 TFT 제작에 적용이 가능할 것으로 기대된다.

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Mobility Determination of Thin Film a-Si:H and poly-Si

  • Jung, S.M.;Choi, Y.S.;Yi, J.S.
    • Journal of Sensor Science and Technology
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    • v.6 no.6
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    • pp.483-490
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    • 1997
  • Thin film Si has been used in sensors, radiation detectors, and solar cells. The carrier mobility of thin film Si influences the device behavior through its frequency response or time response. Since poly-Si shows the higher mobility value, a-Si:H films on Mo substrate were subjected to various crystallization treatments. Consequently, we need to find an appropriate method in mobility measurement before and after the anneal treatment. This paper investigates the carrier mobility improvement with anneal treatments and summarizes the mobility measurement methods of the a-Si:H and poly-Si film. Various techniques were investigated for the mobility determination such as Hall mobility, HS, TOF, SCLC, TFT, and TCO method. We learned that TFT and TCO method are suitable for the mobility determination of a-Si:H and poly-Si film. The measured mobility was improved by $2{\sim}3$ orders after high temperature anneal above $700^{\circ}C$ and grain boundary passivation using an RF plasma rehydrogenation.

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Channel Protection Layer Effect on the Performance of Oxide TFTs

  • KoPark, Sang-Hee;Cho, Doo-Hee;Hwang, Chi-Sun;Yang, Shin-Hyuk;Ryu, Min-Ki;Byun, Chun-Won;Yoon, Sung-Min;Cheong, Woo-Seok;Cho, Kyoung-Ik;Jeon, Jae-Hong
    • ETRI Journal
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    • v.31 no.6
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    • pp.653-659
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    • 2009
  • We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.

Inverse Sta99ered Poly-Si TFT with a-Si Offset formed by Selective Excimer Laser Annealing (선택적 레이저 어닐링을 이용하여 비정질 실리콘 오프셋을 갖는 Inverse Staggered 다결정 실리콘 박막 트랜지스터)

  • Park, Kee-Chan;Choi, Kwon-Young;Kim, Cheon-Hong;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1633-1635
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    • 1997
  • For AMLCD pixel switching device, poly-Si TFT has the advantage of high field effect mobility over a-Si TFT. However, it also has some disadvantage such as large leakage current and more masking steps. We propose a new Inverse Staggered poly-Si TFT with a-Si offset. We have fabricated the new device and verified high ON/OFF current ratio. The device has lower leakage current level than the conventional Inverse Staggered poly-Si TFT and the same number of masking steps compared with conventional a-Si TFT's.

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Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics (Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성)

  • Lee, Woo-Hyun;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.1
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    • pp.1-4
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    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

Possibility of Si TFT Technology

  • Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.31-33
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    • 2002
  • Si TFTs are applied not only to stacked SRAM but also to FPD. Improvement of device characteristic such as an enhancement of carrier mobility or a reduction of leakage current is studied intensively. The TFT technology is developing based on conventional Si LSI technology. By establishing a stable fabrication process on flexible substrate and high performance characteristic uniformly and reliably, TFT technology has a possibility to develop to SOP or other highly functional applications similar to or beyond the conventional Si LSI in the era of information and telecommunication.

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