• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.256-259
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• 1999

A new PWM method for voltage source inverters is described. The switching instants determination of the proposed PWM scheme is simple. Therefore, hardware implementation with a microprocessor system is easy and high frequency operation of an inverter can be obtained. The maximum line-to-line output voltage of 3-phase inverter with the proposed scheme is larger than that of the SPWM inverter under a linear modulation region. Principle of the proposed PWM method is described and harmonic characteristic analysis is carried out.

• Proceedings of the KIPE Conference
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• 2003.11a
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• pp.17-20
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• 2003

This paper presents a high frequency (HF) link current-fed inverter fur fuel cell applications. The circuit topology, operation and control method of the proposed HF link current-fed inverter are presented. The active cancellation technique of the 120Hz input harmonic current is also considered. The simulation results are provided to show the feasibility of the proposed inverter scheme.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1567-1576
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• 2015

Offline inductance identification of a permanent magnet synchronous motor (PMSM) is essential for the design of the closed-loop controller and position observer in sensorless vector controlled drives. On the base of the offline inductance identification method combining direct current (DC) offset and high frequency (HF) voltage injection which is fulfilled at standstill, this paper investigates the inverter nonlinearity effects on the inductance identification while considering harmonics in the induced HF current. The negative effects on d-q axis inductance identifications using HF signal injection are analyzed after self-learning of the inverter nonlinearity characteristics. Then, both the voltage error and the harmonic current can be described. In addition, different cases of voltage error distribution with different injection conditions are classified. The effects of inverter nonlinearities on the offline inductance identification using HF injection are validated on a 2.2 kW interior PMSM drive.

• Journal of Power Electronics
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• v.12 no.5
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• pp.699-707
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• 2012

This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.1
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• pp.9-14
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• 2008

Since they use the low switching frequency in multilevel inverter systems, they generate the high low frequency harmonic components. Generally, LC filter is used at the output terminal of inverter systems to solve this problem. But it causes a voltage drop at the output terminal by use of damping resistors, and causes the problem in which system efficiency decreases due to power loss of the damping resistor. In this paper, we proposed an output filter design method for NPC three-level inverter systems with low switching frequency. And we analyzed the efficiency of the proposed filter system, and the effectiveness of the proposed system is verified by simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.403-405
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• 2007

This paper presents the over-modulation strategy and indirect vector control drive of NPC type PWM inverter. NPC inverter has three level phase voltage output.It can perform in high voltage through assembling switching components. It has less harmonics and surge voltage stress at motor terminals than the 2 level inverter in same switching frequency through 3 level voltage. The conventional railway vehicle has used the vector control to MI=0.907 and the slip-frequency control from MI=0.907 to six-step mode. The slip-frequency control has bad motive power and slow torque control response. But vector control has good motive power and can instant torque control. In this paper, output voltage is controlled linearly from linear region to six-step mode by using over-modulation strategy. And NPC inverter is used.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.430-437
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• 2004

This thesis proposes novel SRP-PWM(Separately Random Pulse Position PWM) techniques and novel two-phase switching pattern applied to four-switch inverter, having various advantages such as operation time decrease that is required for decrease of switching damage, easy of implementation and inverter control at high frequency switching. In this thesis, we wish to confirm that SRP-PWM techniques disperse harmonic spectrum of inverter output current evenly into wide frequency area, that is, side-band of specification frequency. And we confirm the harmonic reduction effect of proposed techniques. Therefore, we will achieve an experiment by IGBT inverter using DSP and will verify the validity of proposed techniques compared with simulation results that use MATLAB/SIMULINK.

• Journal of Electrical Engineering and Technology
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• v.4 no.2
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• pp.255-265
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• 2009

This paper presents the acoustic noise and mechanical vibration reduction of a coreless brushless DC motor with an air dynamic bearing used in a digital lightening processor. The coreless brushless DC motor does not have a stator yoke or stator slot to remove the unbalanced force caused by the interaction between the stator yoke and the rotor magnet. An unbalanced force makes slotless brushless DC motors vibrate and mechanically noisy, and the attractive force between the magnet and the stator yoke increases power consumption. Also, when a coreless brushless DC motor is driven by a $120^{\circ}$ conduction type inverter, high frequency acoustic noise occurs because of the peak components of the phase currents caused by small phase inductance and large phase resistance. In this paper, a core-less brushless DC motor with an air dynamic bearing to remove mechanical vibration and to reduce power consumption is applied to a digital lightening processor. A $180^{\circ}$ conduction type inverter drives it to reduce high frequency acoustic noise. The applied methods are simulated and tested using a manufactured prototype motor with an air dynamic bearing. The experimental results show that a coreless brushless DC motor has characteristics of low power consumption, low mechanical vibration, and low high frequency acoustic noise.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.1
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• pp.43-51
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• 2010

This paper proposes an analysis of voltage delay and compensation for current control in H-Bridge Multi-Level (HBML) inverters for a medium voltage motor drive with vector control. It is shown that the expansion and modularization capability of the HBML inverter is improved in case of using Phase-Shifted Pulse Width Modulation (PSPWM) since individual inverter modules operate more independently. But, the PSPWM of HBML has a phase difference between reference voltage and real voltage, which can cause instability in the current regulator at high speed where the ratio of the sampling frequency to the output frequency is insufficient. This instability of the current regulator is removed by adding a proposed method which compensate a phase difference between reference voltage and real voltage. The proposed method is suitable for HBML inverter controlled by PSPWM with low switching frequency and high speed motor drive. The validity of the proposed method is verified experimentally on 6,600[V] 1,400[kW] induction motor fed by an 13-level HBML inverter.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.