• 한국전기전자재료학회논문지
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• 제11권9호
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• pp.705-710
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• 1998

Intrinsic gettering is usually to improve wafer quality, which is an important factor for reliable ULSI devices. In order to generate oxygen precipitation in lightly and heavily boron doped silicon wafers with or without high $^75 As^+$ ion implantation, the 2-step annealing method was adopted. After annealing, the were cleaved and etched with th Wright etchant. The morphology of cross section on samples was inspected by FESEM(field emission scanning electron microscopy). The morphology of unimplanted samples was rater rough than that of the implanted. Oxygen precipitation density observed by an optical microscope in lightly boron doped samples was about 3$\times10^6/cm^3$. However, in heavily boron doped samples, the density of oxygen precipitation was largest at $600^{\circ}C$ in 1st annealing, and decreased abruptly until $800^{\circ}C$, But it increased slightly at $1000^{\circ}C$ and was independent with the implantation.

• 한국재료학회지
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• 제11권1호
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• pp.55-60
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• 2001

고 에너지 (1.5 MeV) 이온 주입된 Boron의 농도와 silicon 기판의 초기 산소 농도의 변화에 따라 silicon기판에 형성된 결정 결함 및 금속 불순물의 Gettering 효율에 대하여 DLTS(Deep Level Transient Spectroscopy), SIMS(Secondary ion Mass Spectroscopy), BMD(Bulk Micro-Defect) analysis 및 TEM (Transmission Electron Microscopy)을 이용하여 연구하였다. 이온 주입 전후의 DLTS 결과를 확산로 및 RTA를 이용한 열처리 전후의 DLTS 결과와 비교할 때 이온 주입 전 시편에서 볼 수 있는 공공에 의한 깊은 준위는 열처리 온도의 증가에 따라 금속 불순물과 관련된 깊은 준위로 천이함을 알 수 있다. 또한 고온 열처리의 경우, 초기 산소 농도가 높을수록 깊은 준위의 농도가 감소함을 볼 때 초기 산소 농도가 높을 수록 gettering 효율 측면에서 유리한 것으로 사료된다

• 한국세라믹학회지
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• 제36권9호
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• pp.887-892
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• 1999

The inner crack-like pore with controlled amount of Ca impurity in the high purity alumina single crystal sapphire had been created by micro-fabrication technique which includes ion implanation photo-lithography Ar ion milling and hot press technique. The crack-like pores in two-hour hot pressed specimen were extremely stable even after heat treating at 1,80$0^{\circ}C$ for 5 hours almost no healing was observed. But the crack-like pores in one-hour hot pressed specimen at 1,30$0^{\circ}C$ were healed by heat treatment and the amount of healing was increased with the heat treatment time and temperature and the amount of Ca addition. The edges of crack-like pore parallel to <1100> direction in (001) basal plane were stable but the edges normal to this direction in (00101) plane <1120> direction were unstable to facetting This means that the surface energy of alumina along the <1100> direction in (0001) basal plane in much lower than <1120> direction.

• 한국전기전자재료학회논문지
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• 제21권8호
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• pp.687-694
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• 2008

This paper is focused on the improvement of MOS device reliability related to deuterium process. The injection of deuterium into the gate oxide film was achieved through two kind of method, high-pressure annealing and low-energy implantation at the back-end of line, for the purpose of the passivation of dangling bonds at $SiO_2/Si$ interface. Experimental results are presented for the degradation of 3-nm-thick gate oxide ($SiO_2$) under both negative-bias temperature instability (NBTI) and hot-carrier injection (HCI) stresses using P and NMOSFETs. Annealing process was rather difficult to control the concentration of deuterium. Because when the concentration of deuterium is redundant in gate oxide excess traps are generated and degrades the performance, we found annealing process did not show the improved characteristics in device reliability, compared to conventional process. However, deuterium ion implantation at the back-end process was effective method for the fabrication of the deuterated gate oxide. Device parameter variations under the electrical stresses depend on the deuterium concentration and are improved by low-energy deuterium implantation, compared to conventional process. Our result suggests the novel method to incorporate deuterium in the MOS structure for the reliability.

• 한국전기전자재료학회논문지
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• 제17권11호
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• pp.1156-1166
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• 2004

Antimony profiles by MeV implantation are measured by secondary ion mass spectrometry (SIMS) and spreading resistance (SR). The moments of SIMS and simulated profiles are calculated and compared for the exact range in MeV energy. SRIM, DUPEX, ICECREM, and TSUPREM4 simulation programs are used for the calculation of range 1D, 2D. SRIM is a Monte Carlo simulation program and different inter-atomic potentials can be used for the calculation of nuclear stopping power cross-section (Sn) and range moments. Nevertheless, the range parameters were not influenced from nuclear stopping power in MeV. Through the modification of electronic stopping power cross-section (Se), the results of simulation are remarkably improved and matched very well with SIMS data. The values of electronic stopping power are optimized for Sb high energy implantation. For the electrical activation, Sb implanted samples are annealed under $N_2$ and $O_2$ ambient. Finally, Oxidation retard diffusion(ORD) effect of Sb implanted sample are demonstrated by SR measurements and ICECREM simulation.

• 한국표면공학회지
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• 제32권3호
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• pp.351-355
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• 1999

BN films with a high content of cubic phase has been deposited by a variety of techniques. It is well known that c-BN films grow with a unique microstructure consisting of $sp^2$ and $sp^{3-}$ bonded layers. Because of existence of the initially grown $sp^{2-}$ /bonded layer, BN films are not adhesive to the substrates. In this study, post-N$^{+ }$ / implantation was applied to improve the adhesion of the films. A Monte Carlo program TAMIX was used to simulate this modification process. The simulation showed nitrogen concentration profile at $1200\AA$ in depth in case of 50keV -implantation energy. FTIR spectra of the $N^{+}$ implanted specimens demonstrated a strong change of absorption band at 1380 cm$^{ -1 }$The films were also investigated by HRTEM. From these results, it is concluded that the post ion implantation could be an effective technique which improves the adhesion between BN film and substrate.

• 전자공학회논문지A
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• 제30A권8호
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• pp.42-48
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• 1993

Ar ions were implanted at 1 MeV into (100)Cz Si wafers with dose of 1 * 10$^{15}$ ions/cm$^{2}$. Damage induced by high energy implantation and its annealing behavior during rapid thermal annealing for 10sec at temperatures from 550 to 1100${\circ}C$ were investigated by crosssection transmission electron microscopy study. It can be clearly seen from the observation that the SPE(Solid Phase Epitaxy) regrowth of the buried amorphous layer induced by ion implantation proceeds from both upper and lower amorphous/crystalline (a/c) interfaces, and the activation energy for SPE from interfaces were both 1.43eV. Misfit dislocation where two interfaces met was formed and it coalesced into the hair pin dislocation in the upper regrown region. At the higher temperature after annealing out of the misfit dislocation, hair pin dislocations showed considerable drop in its bandwidth. However, they were not disappeared even at the temperature 1100${\circ}C$ with the end of range dislocation loops which were formed at the original lower a/c interface.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.109-112
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• 2007

In this paper we describe a robust method of improving precision in monitoring high energy ion implantation processes. Ion implant energy accuracy was measured in the device manufacturing process using an unpatterned implanted layer on an intrinsic p-type silicon wafer. To increase Rs sensitivity to energy at the well implant process, a PN junction structure was formed by P-well and deep N-well implants into the p-type Si wafer. It was observed that the depletion layer formed by the PN junction was very sensitive to energy variation of the well implant. Conclusively, it can be recommended to monitor well implant processes using the Rs measurement method described herein, i.e., a PN junction diode structure since it shows excellent Rs sensitivity to variation caused by energy difference at the well implant step.

• 청정기술
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• 제29권4호
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• pp.255-261
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• 2023

파워반도체는 전력의 변환, 변압, 분배 및 전력제어 등을 감당하는데 사용되는 반도체이다. 최근 세계적으로 고전압 파워반도체의 수요는 다양한 산업분야에 걸쳐 증가하고 있는 추세이며 해당 산업에서는 고전압 IGBT 부품의 최적화 연구가 절실한 상황이다. 고전압 IGBT개발을 위해서 wafer의 저항값 설정과 주요 단위공정의 최적화가 완성칩의 전기적특성에 큰 변수가 되며 높은 항복전압(breakdown voltage) 지지를 위한 공정 및 최적화 기술 확보가 중요하다. 식각공정은 포토리소그래피공정에서 마스크회로의 패턴을 wafer에 옮기고, 감광막의 하부에 있는 불필요한부분을 제거하는 공정이고, 이온주입공정은 반도체의 제조공정 중 열확산기술과 더불어 웨이퍼 기판내부로 불순물을 주입하여 일정한 전도성을 갖게 하는 과정이다. 본 연구에서는 IGBT의 3.3 kV 항복전압을 지지하는 ring 구조형성의 중요한 공정인 field ring 식각실험에서 건식식각과 습식식각을 조절해 4가지 조건으로 나누어 분석하고 항복전압확보를 위한 안정적인 바디junction 깊이형성을 최적화하기 위하여 TEG 설계를 기초로 field ring 이온주입공정을 4가지 조건으로 나누어 분석한 결과 식각공정에서 습식 식각 1스텝 방식이 공정 및 작업 효율성 측면에서 유리하며 링패턴 이온주입조건은 도핑농도 9.0E13과 에너지 120 keV로, p-이온주입 조건은 도핑농도 6.5E13과 에너지 80 keV로, p+ 이온주입 조건은 도핑농도 3.0E15와 에너지 160 keV로 최적화할 수 있었다.

• 한국생산제조학회지
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• 제20권2호
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• pp.162-168
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• 2011

In this research, nitrogen plasma source ion implantation(PSII) of non-coated tungsten carbide endmill tools was conducted with low heat treatment for increasing wear resistance. After the low heat treatment of PSIIed tools to give a homogeneity of wear resistance, the surface modification of tools was analyzed by hardness test, surface roughness and cutting forces. As for the resultant cutting forces, low heat treatment in temperature of $400^{\circ}C$ and $500^{\circ}C$ is stable because of low cutting resistance. The 20-minutes heat treated tool at spindle speed 25000rpm has superiority of surface roughness, Ra of $0.420{\mu}m$ and was found to have good wear resistance. The higher hardness value was obtained by increasing temperature from $300^{\circ}C$ to $600^{\circ}C$ for PSIIed tools with low heat treatment. As the PSIIed tools under 10minutes at temperature of $600^{\circ}C$ have the highest hardness as Hv of 2349.8, It was analyzed that temperature processing give much influences on hardness.