• JSTS:Journal of Semiconductor Technology and Science
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• 제12권2호
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

• 한국정보통신학회논문지
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• 제12권11호
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• pp.2015-2021
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• 2008

최근 태양광 발전시스템 등 낮은 전압을 발생하는 전원소스를 이용하여 높은 승압효과를 얻기 위한 멀티레벨 인버터에 대한 관심이 높아지고 있다. 본 연구에서는 DC/DC의 출력전압 리플 저감을 위한 새로운 구조의 다중레벨 DC/DC 컨버터를 제안한다. 제안된 컨버터는 Buck컨버터를 직렬로 연결하여 다중전압을 발생하는 구조를 취함으로 기존의 Buck 컨버터에 비하여 출력 전압의 리플을 저감할 수 있었다. 또한 FPGA 기반 멀티레벨 인버터용 스위칭 함수를 구현하고자 하였다.

• 전력전자학회논문지
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• 제26권2호
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• pp.112-119
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• 2021

This study proposes a design method of high-power-density and high-efficiency low-voltage DC-DC converters using SiC MOSFET and the optimized planar transformer design procedure based on the figure-of-merit. The secondary rectifying circuit of the phase-shifted full-bridge converter is compared to achieve high power density and high efficiency, and the phase-shifted full bridge converter with a current-doubler rectifier is selected. The planar transformer is designed by the proposed optimized design procedure and verified by FEA simulation. To validate the proposed design method, experimental results from a 3 kW prototype are provided. The prototype achieved 95.28% maximum efficiency and a power density of 2.98 kW/L.

• Journal of Electrical Engineering and Technology
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• 제1권2호
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• pp.216-225
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• 2006

This paper presents a new circuit topology of DC busline switch and snubbing capacitor-assisted full-bridge soft-switching PWM inverter type DC-DC power converter with a high frequency link for low voltage large current applications as DC feeding systems, telecommunication power plants, automotive DC bus converters, plasma generator, electro plating plants, fuel cell interfaced power conditioner and arc welding power supplies. The proposed power converter circuit is based upon a voltage source-fed H type full-bridge high frequency PWM inverter with a high frequency transformer link. The conventional type high frequency inverter circuit is modified by adding a single power semiconductor switching device in series with DC rail and snubbing lossless capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge inverter arms and DC busline can achieve ZVS/ZVT turn-off and ZCS turn-on commutation operation. Therefore, the total switching losses at turn-off and turn-on switching transitions of these power semiconductor devices can be reduced even in the high switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules is selected to be 60 kHz. It is proved experimentally by the power loss analysis that the more the switching frequency increases, the more the proposed DC-DC converter can achieve high performance, lighter in weight, lower power losses and miniaturization in size as compared to the conventional hard switching one. The principle of operation, operation modes, practical and inherent effectiveness of this novel DC-DC power converter topology is proved for a low voltage and large current DC-DC power supplies of arc welder applications in industry.

• Journal of Power Electronics
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• 제18권2호
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• pp.332-342
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• 2018

This paper proposes a parameter design method for multi-element resonant converters (MERCs) with a unique resonant zero point (RZP). This method is mainly composed of four steps. These steps include program filtration, loss comparison, 3D figure fine-tuning and priority compromise. It features easy implementation, effectiveness and universal applicability for almost all of the existing RZP-MERCs. Meanwhile, other design methods are always exclusive for a specific topology. In addition, a novel dual-CTL converter is also proposed here. It belongs to the RZP-MERC family and is designed in detail to explain the process of parameter selection. The performance of the proposed method is verified experimentally on a 500W prototype. The obtained results indicate that with the selected parameters, an extensive dc voltage gain is obtained. It also possesses over-current protection and minimal switching loss. The designed converter achieves high efficiencies among wide load ranges, and the peak efficiency reaches 96.9%.

• Journal of Power Electronics
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• 제12권2호
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• pp.317-325
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• 2012

Resonant immittance converter (RIC) topologies can transform a current source into a voltage source (Type-I RICs) and vice versa (Type-II RICs), thereby making them suitable for many power electronics applications. RICs are operated at a fixed frequency where the resonant immittance network (RIN) exhibits immittance conversion characteristics. It is observed that the low-frequency response of Type-II RINs is relatively flat and that the state variables associated with Type-II RINs affect the response only at the high frequencies in the vicinity of the switching frequency. The overall response of a Type-II RIC is thus dominated by the filter response, which is particularly important for the controller design. Therefore, an approximate equivalent circuit model and a small-signal model of Type-II RICs are proposed in this paper, neglecting the high-frequency response of Type-II RINs. While the proposed models greatly simplify and speed-up the analysis, it adequately predicts the open-loop transient and small-signal ac behavior of Type-II RICs. The validity of the proposed models is confirmed by comparisons of their results with those obtained from a cycle-by-cycle simulation and with an experimental prototype.

• Journal of Power Electronics
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• 제19권6호
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• pp.1429-1439
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• 2019

Buck-Boost LLC (BBLLC) converters based on a PWM + phase control strategy are good candidates for high efficiency, high power density and wide input range applications. Nevertheless, they suffer from large computational complexity when it comes to calculating the optimal phase for ZVS of all the switches. In this paper, a method is proposed for a microcontroller unit (MCU) to calculate the optimal phase quickly and accurately. Firstly, a 2-D lookup table of the phase is established with an index of the input voltage and output current. Then, a bilinear interpolation method is applied to improve the accuracy. Meanwhile, simplification of the phase equation is presented to reduce the computational complexity. When compared with conventional curve-fitting and LUT methods, the proposed method makes the best tradeoff among the accuracy of the optimal phase, the computation time and the memory consumption of the MCU. Finally, A 350V-420V input, 24V/30A output experimental prototype is built to verify the proposed method. The efficiency can be improved by 1% when compared with the LUT method, and the computation time can be reduced by 13.5% when compared with the curve-fitting method.

• Journal of Power Electronics
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• 제19권4호
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• pp.846-857
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• 2019

Voltage step-down converters are very popular in distributed power systems, voltage regular modules, electric vehicles, etc. However, a high step-down voltage ratio is required in many applications to prevent the traditional buck converter from operating at extreme duty cycles. In this paper, a series capacitor interleaved buck converter with a soft switching technique is proposed. The DC voltage ratio of the proposed converter is half that of the traditional buck converter and the voltage stress across the one main switch and the diodes is reduced. Moreover, by paralleling the series connected auxiliary switch and the auxiliary inductor with the main inductor, zero voltage transition (ZVT) of the main switches can be obtained without increasing the voltage or current stress of the main power switches. In addition, zero current turned-on and zero current switching (ZCS) of the auxiliary switches can be achieved. Furthermore, owing to the presence of the auxiliary inductor, the turned-off rate of the output diodes can be limited and the reverse-recovery switching losses of the diodes can be reduced. Thus, the efficiency of the proposed converter can be improved. The DC voltage gain ratio, soft switching conditions and a design guideline for the critical parameters are given in this paper. A loss analysis of the proposed converter is shown to demonstrate its advantages over traditional converter topologies. Finally, experimental results obtained from a 100V/10V prototype are presented to verify the analysis of the proposed converter.

• Journal of Power Electronics
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• 제9권1호
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• pp.18-25
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• 2009

Conventional series-resonant pulse frequency modulation controlled DC-DC high power converters with a high-frequency transformer link which is designed for driving the high power microwave generator has the problem of hard switching commutation at turn-on and turn-off of active power switching devices. This problem is due to the influence of the magnetizing current of the high-frequency transformer. This paper presents a novel prototype for a high-frequency transformer using parasitic parameters with a lossless inductive snubber and a series resonant capacitor assisted series-resonant zero current switching pulse frequency modulated DC-DC power converter, which is designed using a high power magnetron for microwave ovens. In order to implement a complete and efficient soft switching commutation, the performance of the new converter topology is practically confirmed and evaluated in the prototype of a power microwave generator.

• 조명전기설비학회논문지
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• 제16권2호
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• pp.45-53
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• 2002

본 논문은 두 지역 간에 직렬로 연결된 HVDC 연계시스템의 전력계통 안정화장치와 전력변환기의 적정 파라메터 선정기법을 다루었다. PSS파라메터 선정기법은 구하고자 하는 진상이 되도록 극좌표를 이동시키고, 충분한 댐핑을 얻도록 이득을 조절하는 고전적인 기법이다. 전력변환기의 적정 파라메터는 근궤적기법을 근거로 하여 기준 값의 변화와 시스템의 동요에 충분한 속응력과 안정도를 고려하여 산정한다. 이들 기법으로 구판 제정수로 소신호 및 과도안정도 분석결과는 사례연구시스템의 고유동요 주파수에 적절한 댐핑 효과를 보여주었다. 본 논문에서 사용한 프로그램은 MATLAB을 근거로 한 PST이다.