• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.626-629
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• 2003

In order to achieve high-resolution and large-size displays, inspection technology is necessary and important. It is a powerful utility for process and yield improvement for the high valued panel realization. We indicated the challenge of advanced panel manufacturing on inspection ability and throughput. We also investigated the method to judge laser-crystallizing energy by inspection technology. Finally, the total defect number and critical killer defects were classified and discussed in this work.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2007년도 춘계학술대회A
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• pp.532-537
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• 2007

Nano imprint lithography(NIL) is a cost-efficient, high-throughput processing technique to transfer nano-scale patterns onto thin polymer films. Polymers used as the resist include UV cured resins as well as thermoplastics such as polymethyl-methacrylate(PMMA). In this study, an analytic investigation was performed for the NIL process of transferring nano scale patterns onto polymeric films. Process optimization calls for a thorough understanding of resist flow during the process. We carried out 2D and 3D numerical analyses of resist flow during NIL process. The simulation incorporated continuum-hypothesis and the effects of surface tension were taken into account. For a more effective prediction of free surface, fixed grid scheme with the volume of fluid (VOF) method were used. The simulation results were verified with experimental results qualitatively. And the parametric study was performed for various process conditions.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권1호
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• pp.146-170
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• 2017

Joint channel assignment and routing is a well-known problem in multi-radio wireless mesh networks for which optimal configurations is required to optimize the overall throughput and fairness. However, other objectives need to be considered in order to provide a high quality service to network users when it deployed with high traffic dynamic. In this paper, we propose a re-configuration optimization model that optimizes the network throughput in addition to reducing the disruption to the mesh clients' traffic due to the re-configuration process. In this multi-objective optimization model, four objective functions are proposed to be minimized namely maximum link-channel utilization, network average contention, channel re-assignment cost, and re-routing cost. The latter two objectives focus on reducing the re-configuration overhead. This is to reduce the amount of disrupted traffic due to the channel switching and path re-routing resulted from applying the new configuration. In order to adapt to traffic dynamics in the network which might be caused by many factors i.e. users' mobility, a centralized heuristic re-configuration algorithm called State-Aware Joint Routing and Channel Assignment (SA-JRCA) is proposed in this research based on our re-configuration model. The proposed algorithm re-assigns channels to radios and re-configures flows' routes with aim of achieving a tradeoff between maximizing the network throughput and minimizing the re-configuration overhead. The ns-2 simulator is used as simulation tool and various metrics are evaluated. These metrics include channel-link utilization, channel re-assignment cost, re-routing cost, throughput, and delay. Simulation results show the good performance of SA-JRCA in term of packet delivery ratio, aggregated throughput and re-configuration overhead. It also shows higher stability to the traffic variation in comparison with other compared algorithms which suffer from performance degradation when high traffic dynamics is applied.

• 반도체디스플레이기술학회지
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• 제12권2호
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• pp.93-98
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• 2013

Nanoimprint lithography (NIL) is a next generation technology for fabrication of micrometer and nanometer scale patterns. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. To successfully imprint a nanosized pattern with the thermal NIL, the process conditions such as temperature and pressure should be appropriately selected. This starts with a clear understanding of polymer material behavior during the thermal NIL process. In this paper, a filling process of the polymer resist into nanometer scale cavities during the thermal NIL at the temperature range, where the polymer resist shows the viscoelastic behaviors with consideration of stress relaxation effect of the polymer. In the simulation, the filling process and the residual layer formation are numerically investigated. And the effects of pressure and temperature on NIL process, specially the residual layer formation are discussed.

• 전기전자학회논문지
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• 제19권4호
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• pp.583-589
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• 2015

HEVC CABAC에서는 하나의 빈을 부호화한 후 확률 모델을 업데이트하고, 업데이트된 확률 모델로 다음 빈을 부호화한다. 기존 CABAC 부호화기는 매 사이클마다 1개의 빈밖에는 부호화하지 못하여 처리율을 향상시킬 수 없었다. 본 논문에서는 확률 모델의 업데이트가 필요없는 우회 빈을 병렬처리 함으로서 처리율을 높인 HEVC CABAC 부호화기를 제안한다. 설계된 CABAC 부호화기는 매 사이클마다 1개의 정규 빈을 처리하거나 최대 4개의 우회 빈을 처리할 수 있으며, 평균적으로 매 사이클당 1.15~1.92개의 빈을 처리한다. 0.18 um 공정에서 합성한 결과, 게이트 수는 메모리를 포함하여 78,698 게이트, 최대 동작 속도는 136 MHz, 최대 처리율은 261 Mbin/s이다.

• 한국생산제조학회지
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• 제25권5호
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• pp.368-372
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• 2016

In this study, we develop a novel high-throughput micronanopatterning system that can implement continuous mechanical pattern inscribing on flexible substrates using a rigid grating mold edge. We perform a conceptual design of the process principle, specific modeling, and buildup of a real system prototype. This research also carefully addresses several important issues related to processing and controlling, including precision motion, alignment, heating, and sensing to enable a successful micronanopatterning in a continuous and high-speed fashion. Various micronanopatterns with the desired profiles can be created by tuning the mold shape, temperature, force, and substrate material toward many potential applications involving electronics, photonics, displays, light sources, and sensors, which typically require a large-area and flexible configurations.

• ETRI Journal
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• 제42권4호
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• pp.468-479
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• 2020

The proposed AI processor architecture has high throughput for accelerating the neural network and reduces the external memory bandwidth required for processing the neural network. For achieving high throughput, the proposed super thread core (STC) includes 128 × 128 nano cores operating at the clock frequency of 1.2 GHz. The function-safe architecture is proposed for a fault-tolerance system such as an electronics system for autonomous cars. The general-purpose processor (GPP) core is integrated with STC for controlling the STC and processing the AI algorithm. It has a self-recovering cache and dynamic lockstep function. The function-safe design has proved the fault performance has ASIL D of ISO26262 standard fault tolerance levels. Therefore, the entire AI processor is fabricated via the 28-nm CMOS process as a prototype chip. Its peak computing performance is 40 TFLOPS at 1.2 GHz with the supply voltage of 1.1 V. The measured energy efficiency is 1.3 TOPS/W. A GPP for control with a function-safe design can have ISO26262 ASIL-D with the single-point fault-tolerance rate of 99.64%.

• 한국가시화정보학회지
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• 제12권2호
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• pp.9-12
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• 2014

Conventional electrospray and air spray methods have the vulnerabilities of limited flow rate (throughput) and droplet size, respectively. Since high throughput with uniform size of droplet is required for various applications, an improved technique should be adopted. Here, we report a combined system of an air pressure and an electric field and evaluate the atomization performance of it. The air flow allowed applying high flow rate range and the electric field reinforced the atomization process to generate fine droplets. A correlation between two forces was investigated by comparing the droplet produced by each method. The atomized droplets were measured and visualized by image processing and a particle image velocimetry (PIV). The quantitative results were achieved from the parametric space and the effect of both forces was analyzed. The motion of charged droplets followed the outer electric field rather than the complex vortex in the shear layer so that the droplets accelerated directly toward the grounded collector.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.318.1-318.1
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• 2013

Nowadays Cu2ZnSnS4 (CZTS) solar cell is attracting a lot of attention as a strong alternative to CIGS solar cell due to nontoxic and inexpensive constituent elements of CZTS. From various processes for the fabrication of CZTS solar cell, solution-based deposition of CZTS thin films is well-known non-vacuum process and many researchers are focusing on this method because of large-area deposition, high-throughput, and efficient material usage. Typically the solution-based process consists of two steps, coating of precursor solution and annealing of the precursor thin films. Unlike vacuum-based deposition, precursor solution contains unnecessary elements except Cu, Zn, Sn, and S in order to form high quality precursor thin films, and thus the precise control of precursor thin film preparation is essential for achieving high efficient CZTS solar cells. In this work, we have investigated the effect of preparation condition of CZTS precursor thin films on the performance of CZTS solar cells. The composition of CZTS precursor solution was controlled for obtaining optimized chemical composition of CZTS absorber layers for high-efficiency solar cells. Pre-annealing process of the CZTS precursor thin films was also investigated to confirm the effect of thermal treatment on chemical composition and carbon residues of CZTS absorber layers. The change of the morphology of CZTS precursor thin film by the preparation condition was also observed.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권7호
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• pp.3370-3392
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• 2017

Next Generation Beyond 4G/5G systems will rely on the deployment of small cells over conventional macrocells for achieving high spectral efficiency and improved coverage performance, especially for indoor and hotspot environments. In such heterogeneous networks, the expected performance gains can only be derived with the use of efficient interference coordination schemes, such as Fractional Frequency Reuse (FFR), which is very attractive for its simplicity and effectiveness. In this work, femtocells are deployed according to a spatial Poisson Point Process (PPP) over hexagonally shaped, 6-sector macro base stations (MeNBs) in an uncoordinated manner, operating in hybrid mode. A newly introduced intermediary region prevents cross-tier, cross-boundary interference and improves user equipment (UE) performance at the boundary of cell center and cell edge. With tools of stochastic geometry, an analytical framework for the signal-to-interference-plus-noise-ratio (SINR) distribution is developed to evaluate the performance of all UEs in different spatial locations, with consideration to both co-tier and cross-tier interference. Using the SINR distribution framework, average network throughput per tier is derived together with a newly proposed harmonic mean, which ensures fairness in resource allocation amongst all UEs. Finally, the FFR network parameters are optimized for maximizing average network throughput, and the harmonic mean using a fair resource assignment constraint. Numerical results verify the proposed analytical framework, and provide insights into design trade-offs between maximizing throughput and user fairness by appropriately adjusting the spatial partitioning thresholds, the spectrum allocation factor, and the femtocell density.