• Title/Summary/Keyword: High Order Scheme

Search Result 1,107, Processing Time 0.024 seconds

Harmonic Reduction Scheme By the Advanced Auxiliary Voltage Supply (개선된 보조전원장치에 의한 고조파 저감대책)

  • Yoon, Doo-O;Yoon, Kyoung-Kuk;Kim, Sung-Hwan
    • Journal of the Korean Society of Marine Environment & Safety
    • /
    • v.21 no.6
    • /
    • pp.759-769
    • /
    • 2015
  • Diode rectifiers are very popular in industry. However, they include large low-order harmonics in the input current and do not satisfy harmonic current content restrictions. To reduce the harmonics to the power system, several methods have been introduced. It is heavy and expensive solution to use passive filters as the solution for high power application. Another solution for the harmonic filter is utilization of active filter, but it is too expensive solution. Diode rectifiers with configurations using switching device have been introduced, but they are very complicated. The combined 12-pulse diode rectifier with the square auxiliary voltage supply has been introduced. It has the advantages that auxiliary circuit is simple and inexpensive compared to other strategies. The advanced auxiliary voltage supply in this thesis is presented as a new solution. When the square auxiliary voltage supply applied, the improvement of THD is 6~60[%] in whole load range. But when the advanced auxiliary voltage supply applied, it shows stable and excellent reduction effect of THD as 57~71[%]. Especially, for the case with 10[%] load factor, reduction effect of THD has little effect as 6[%] in the case of inserting a square auxiliary voltage supply. But when the proposed new solution applied, reduction effect has excellent effect as 71[%]. Theoretical analysis of the combined 12-pulse diode rectifier with the advanced auxiliary voltage supply is presented and control methods of the auxiliary supply is proposed. The reduction in the input current harmonics is verified by simulation using software PSIM.

Modeling Three-dimensional Free Surface Flow around Thin Wall Incorporation Hydrodynamic Pressure on δ-coordinate (δ-좌표계에서 동수압 계산 수중벽체 인근흐름 수치모형실험)

  • Kim, Hyo-Seob;Yoo, Ho-Jun;Jin, Jae-Yul;Jang, Chang-Hwan;Lee, Jung-Su;Baek, Seung-Won
    • Journal of Wetlands Research
    • /
    • v.16 no.3
    • /
    • pp.327-336
    • /
    • 2014
  • Submerged thin walls are extreme case of submerged rectangular blocks, and could be used for many purposes in rivers or coastal zones, e.g. to tsunami. To understand flow characteristics including flow and pressure fields around a specific submerged thin wall a numerical model was applied which includes computation of hydrodynamic pressure on ${\sigma}$-coordinate. ${\sigma}$-coordinate has strong merits for simulation of subcritical flow over mild-sloped beds. On the other hand ${\sigma}$-coordinate is quite poor to treat sharp structures on the bed. There have been a few trials to incorporate dynamic pressure in ${\sigma}$-coordinate by some researchers. One of the previous approaches includes process of sloving the Poisson equation. However, the above method includes many high-order terms, and requires long cpu for simulation. Another method SOLA was developed by Hirt et al. for computation of dynamic pressure, but it was valid for straight grid system only. Previous SOLA was modified for ${\sigma}$-coordinate for the present purpose and was adopted in a model system, CST3D. Computed flow field shows reasonable behaviour including vorticity is much stronger than the upstream and downstream of the structure. The model was verified to laboratory experiments at a 2DV flume. Time-average flow vectors were measured by using one-dimensional electro-magnetic velocimeter. Computed flow field agrees well with the measured flow field within 10 % error from the speed point of view at 5 profiles. It is thought that the modified SOLA scheme is useful for ${\sigma}$-coordinate system.

An Empirical Study on the Differential Ratio between Construction Cost for Land Development and Incurred Cost: Case of Housing Business District for Land Development in LH (택지조성원가와 발생원가의 오차에 관한 실증연구 : 택지개발사업지구를 중심으로)

  • Kim, Tae-Gyun;Chang, In-Seok;Lee, Duck-Bok;Kim, Ok-Yon
    • Land and Housing Review
    • /
    • v.3 no.1
    • /
    • pp.59-68
    • /
    • 2012
  • The current land development cost price system is classified as the creating land by construction price and composition changes that occur sporadically in the process of completion at the source of the factors by incurred cost price. Housing for land cost price system is a lack of objectivity which scheme of the such a gap due to the land in accordance construction and incurred cost price system so far. Therefore, in order to increase the objectivity of costing the costing of predictable surprises should be reflected in the process. Under such a background, this study defined the effective differential ratio as the predictable, estimated them for various characteristics of each business district to reflect. For this, set the properties category of five types to attributes and making the complex category and Look-up table. Which result of model validation is showed a high reliability. Therefore, Continuous accumulation of material in the future, when them to reflect the construction cost, will contribute to the bridge the gap the construction cost between incurred them.

Design of Low Power Optical Channel for DisplayPort Interface (저전력 광채널용 디스플레이포트 인터페이스 설계)

  • Seo, Jun-Hyup;Park, In-Hang;Jang, Hae-Jong;Bae, Gi-Yeol;Kang, Jin-Ku
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.11
    • /
    • pp.58-63
    • /
    • 2013
  • This paper presents a transceiver design for DisplayPort interface using an optical channel. By converting the electronic channel to the optical channel, the DisplayPort's main channel can provide a high-speed data transmission for long distance. The design converting the electronic channel to the optical channel in the main channel and AUX channel of the DisplayPort is presented in this paper. Futhermore, the HPD signal transmission by using AUX channel is proposed. In order to minimize power consumption, this paper also proposed a method of controlling the TX block in the main link. The proposed system is designed by a FPGA and an optical module. The FPGA used 651 ALUT(adaptive look-up table)s, 511 resisters and 324 block memory bits. The maximum operating rate of the FPGA is 250MHz. With the proposed power control scheme, 740mW of power dissipation reduction can be achieved at the main link optical TX module.

Performance Analysis of The CCITT X.25 Protocol (X. 25 Protocol의 성능 분석)

  • 최준균;은종관
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.11 no.1
    • /
    • pp.25-39
    • /
    • 1986
  • In this paper, we analyze the performance, particularly the flow control mechanism, of the CCITT X.25 protocol in a packet-switched network. In this analysis, we consider the link and packet layers separately, and investigate the performance in three measures; normalized channel throughput, mean transmission time, and transmission efficiency. Each of these measures is formulated in terms of given protocol parameters such as windos size, $T_1$ and $T_2$ values, message length, and so forth. We model the service procedure of the inpur traffic based on the flow control mechanism of the X.25 protocol, and investigate the mechanism of the sliding window flow control with the piggybacked acknowlodgment scheme using a discrete-time Markov chain model. With this model, we study the effect of variation of the protoccol parameters on the performance of the X.25 protocol. From the numerical results of this analysis one can select the optimal valuse of the protocol parameters for different channel environments. it has been found that to maintain the trasnmission capacity satisfactorily, the window size must be greater than or equal to 7 in a high-speed channel. The time-out value, $T_1$, must carefully be selected in a noisy channel. In a normal condition, it should be in the order of ls. The value of $T_2$ has some effect on the transmission efficiency, but is not critical.

  • PDF

Geochemical Studies on Petrogenesis of the Cretaceous Myeongseongsan Granite in the Northwestern Gyeonggi Massif (경기육괴 북서부에 분포하는 백악기 명성산 화강암의 성인에 대한 지화학적 연구)

  • Yi, Eun Ji;Park, Ha Eun;Park, Young-Rok
    • The Journal of the Petrological Society of Korea
    • /
    • v.26 no.4
    • /
    • pp.327-339
    • /
    • 2017
  • The Cretaceous Myeongseongsan Granite in the northwestern Gyeonggi Massif consists of a major pale pink-colored biotite monzogranite and a minor white-colored biotite alkaligranite. Low Sr and high Ba concentrations, negative Eu-anomalies in REE plot, negative Sr anomalies in spider diagram, a negative correlation between Sr and Rb, and positive correlations between Sr and Ba and $Eu/Eu^*$ indicate that a fractional crystallization of both plagioclase and K-feldspar played a significant role during magma evolution. The Myeongseongsan Granite is plotted in I-& S-type granites on I, S, A-type granite classification scheme. While the biotite monzogranite is plotted in unfractionated I-& S-type granite, the biotite alkaligranite is plotted in fractionated I-& S-type granite, which indicates that the biotite alkaligranite is a more differentiated product. In order to elucidate the nature of the protoliths of the peraluminous Myeongseongsan magma, we plotted in $Al_2O_3/TiO_2$ vs. $CaO/Na_2O$ and Rb/Sr vs. Rb/Ba diagrams, and they suggest that the Myeongseongsan Granite was derived from clay-poor metagreywackes and meta-psammites or their igneous counterparts. Whole-rock zircon saturation temperature indicates that the Myeongseongsan magma was melted at $740-799^{\circ}C$.

A 10-bit 100 MSPS CMOS D/A Converter with a Self Calibration Current Bias Circuit (Self Calibration Current Bias 회로에 의한 10-bit 100 MSPS CMOS D/A 변환기의 설계)

  • 이한수;송원철;송민규
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.11
    • /
    • pp.83-94
    • /
    • 2003
  • In this paper. a highly linear and low glitch CMOS current mode digital-to-analog converter (DAC) by self calibration bias circuit is proposed. The architecture of the DAC is based on a current steering 6+4 segmented type and new switching scheme for the current cell matrix, which reduced non-linearity error and graded error. In order to achieve a high performance DAC . novel current cell with a low spurious deglitching circuit and a new inverse thermometer decoder are proposed. The prototype DAC was implemented in a 0.35${\mu}{\textrm}{m}$ n-well CMOS technology. Experimental result show that SFDR is 60 ㏈ when sampling frequency is 32MHz and DAC output frequency is 7.92MHz. The DAC dissipates 46 mW at a 3.3 Volt single power supply and occupies a chip area of 1350${\mu}{\textrm}{m}$ ${\times}$750${\mu}{\textrm}{m}$.

A Design of an Automatic Current Correcting Charge-Pump using Replica Charge Pump with Current Mismatch Detection (부정합 감지 복제 전하 펌프를 이용한 자동 전류 보상 전하 펌프의 설계)

  • Kim, Seong-Geun;Kim, Young-Shin;Pu, Young-Gun;Park, Joon-Sung;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.2
    • /
    • pp.94-99
    • /
    • 2010
  • This paper presents a charge pump architecture for correcting the current mismatch due to the PVT variation. In general, the current mismatch of the charge pump should be minimized to improve the phase noise and spur performance of the PLL. In order to correct the current mismatch of the charge pump, the current difference is detected by the replica charge pump and fed back into the main charge pump. This scheme is very simple and guarantees the high accuracy compared with the prior works. Also, it shows a good dynamic performance because the mismatch is corrected continuously. It is implemented in 0.13um CMOS process and the die area is $100{\mu}m\;{\times}\;160{\mu}m$. The voltage swing is from 0.2V to 1V at supply voltage of 1.2V. The charging and discharging currents are $100{\mu}A$, respectively and the current mismatch due to the PVT variation is less than 1%.

Digital Modulation Types Recognition using HOS and WT in Multipath Fading Environments (다중경로 페이딩 환경에서 HOS와 WT을 이용한 디지털 변조형태 인식)

  • Park, Cheol-Sun
    • Journal of the Institute of Electronics Engineers of Korea CI
    • /
    • v.45 no.5
    • /
    • pp.102-109
    • /
    • 2008
  • In this paper, the robust hybrid modulation type classifier which use both HOS and WT key features and can recognize 10 digitally modulated signals without a priori information in multipath fading channel conditions is proposed. The proposed classifier developed using data taken field measurements in various propagation model (i,e., rural area, small town and urban area) for real world scenarios. The 9 channel data are used for supervised training and the 6 channel data are used for testing among total 15 channel data(i.e., holdout-like method). The Proposed classifier is based on HOS key features because they are relatively robust to signal distortion in AWGN and multipath environments, and combined WT key features for classifying MQAM(M=16, 64, 256) signals which are difficult to classify without equalization scheme such as AMA(Alphabet Matched Algorithm) or MMA(Multi-modulus Algorithm. To investigate the performance of proposed classifier, these selected key features are applied in SVM(Support Vector Machine) which is known to having good capability of classifying because of mapping input space to hyperspace for margin maximization. The Pcc(Probability of correct classification) of the proposed classifier shows higher than those of classifiers using only HOS or WT key features in both training channels and testing channels. Especially, the Pccs of MQAM 3re almost perfect in various SNR levels.

Digitalization of the Nuclear Steam Generator Level Control System (증기발생기 수위조절 시스템의 디지탈화)

  • Lee, Yoon-Joon;Lee, Un-Chul
    • Nuclear Engineering and Technology
    • /
    • v.25 no.1
    • /
    • pp.125-135
    • /
    • 1993
  • The safe and efficient operation of nuclear plants is recognized to be accomplished through the application of plant automation using digital technology, which is one of main targets of the next generation nuclear plants. For plant level automation, it is first required that each major subsystem be digitalized, and the steam generator water level control system is discussed in this study. The transfer functions between inputs and the level are derived by employing the thermal hydraulic model of the steam generator and are applied to the analysis of the current three-element control system. Since the control scheme in this study includes the steam generator itself as a process plant, the system order is high and the numerical instability arises in digitalizing. Together with this, the unreliability of the feedwater feedback signal at low power level leads to the proposal of a two-element control system with a proper digital controller. The digital PI controller developed for this system has the initial power adaptive gain and integration time constant. And it makes the overall system response satisfy the stability and other necessary control specifications simultaneously. Since the two-element control system using this controller depends on the initial power only, it is simple to define and it shows a similar level response behavior to that of its corresponding analog system.

  • PDF