• 한국재료학회지
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• 제28권9호
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• pp.528-533
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• 2018

In recent years, solar cells based on crystalline silicon(c-Si) have accounted for much of the photovoltaic industry. The recent studies have focused on fabricating c-Si solar modules with low cost and improved efficiency. Among many suggested methods, a photovoltaic module with a shingled structure that is connected to a small cut cell in series is a recent strong candidate for low-cost, high efficiency energy harvesting systems. The shingled structure increases the efficiency compared to the module with 6 inch full cells by minimizing optical and electrical losses. In this study, we propoese a new Conductive Paste (CP) to interconnect cells in a shingled module and compare it with the Electrical Conductive Adhesives (ECA) in the conventional module. Since the CP consists of a compound of tin and bismuth, the module is more economical than the module with ECA, which contains silver. Moreover, the melting point of CP is below $150^{\circ}C$, so the cells can be integrated with decreased thermal-mechanical stress. The output of the shingled PV module connected by CP is the same as that of the module with ECA. In addition, electroluminescence (EL) analysis indicates that the introduction of CP does not provoke additional cracks. Furthermore, the CP soldering connects cells without increasing ohmic losses. Thus, this study confirms that interconnection with CP can integrate cells with reduced cost in shingled c-Si PV modules.

• 한국진공학회지
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• 제19권2호
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• pp.114-120
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• 2010

일반적으로 결정질 실리콘 태양전지에서 표면에 텍스쳐링(texturing)하는 것은 알칼리 또는 산성 같은 화학용액을 사용하고 있다. 그러나 실리콘 부족으로 실리콘의 양의 감소로 인하여 웨이퍼 두께가 감소하고 있는 추세에 일반적으로 사용하고 있는 습식 텍스쳐링 방법에서 화학용액에 의한 많은 양의 실리콘이 소모되고 있어 웨이퍼의 파손이 심각한 문제에 직면하고 있다. 그리하여 습식 텍스쳐링 방법보다는 플라즈마로 텍스쳐링할 수 있는 건식 텍스쳐링 방법인 RIE (reactive ion etching) 기법이 대두되고 있다. 그리고 습식 텍스쳐링으로는 결정질 실리콘 태양전지의 반사율을 10% 이하로는 낮출 수가 없다. 다결정 실리콘 웨이퍼 표면에 텍스쳐링을 하기 위하여 125 mm 웨이퍼 144개를 수용할 수 있는 대규모 플라즈마 RIE 장비를 개발하였다. 반사율을 4% 이하로 낮추기 위하여 공정가스는 $Cl_2$, $SF_6$, $O_2$를 기반으로 RIE 텍스쳐링을 하였고 텍스쳐링의 모양은 공정가스, 공정시간, RF 주파수 등에 의해 조절이 가능하였다. 본 연구에서 RIE 공정을 통하여 16.1%의 변환효율을 얻었으며, RF 주파수가 텍스쳐링의 모양에 미치는 영향을 살펴보았다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Current Photovoltaic Research
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• 제5권2호
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• pp.47-54
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• 2017

We report finding ways to improve the long-term reliability of PV module including the heterostructure with the intrinsic thin layer (HIT) solar cell. We point out the stability of the products of Panasonic HIT cell. We account for a brief description of the module manufacturing process to investigate the issues of each process and analyze the causes. We carried out the silicon PV module of the glass to glass type under the damp heat test around 1000 hours. However, it degraded around 7% of PV module power after 300 hours exposure in comparison with the initial status (Initial: 12.7 Watt). We investigated possible cause and solutions for the module performance to develop the long-term reliability.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.454-454
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• 2014

Silicon microwire array is one of the promising platforms as a means for developing highly efficient solar cells thanks to the enhanced light trapping efficiency. Among the various fabrication methods of microstructures, deep reactive ion etching (DRIE) process has been extensively used in fabrication of high aspect ratio microwire arrays. In this presentation, we show precisely controlled Si microwire arrays by tuning the DRIE process conditions. A periodic microdisk arrays were patterned on 4-inch Si wafer (p-type, $1{\sim}10{\Omega}cm$) using photolithography. After developing the pattern, 150-nm-thick Al was deposited and lifted-off to leave Al microdisk arrays on the starting Si wafer. Periodic Al microdisk arrays (diameter of $2{\mu}m$ and periodic distance of $2{\mu}m$) were used as an etch mask. A DRIE process (Tegal 200) is used for anisotropic deep silicon etching at room temperature. During the process, $SF_6$ and $C_4F_8$ gases were used for the etching and surface passivation, respectively. The length and shape of microwire arrays were controlled by etching time and $SF_6/C_4F_8$ ratio. By adjusting $SF_6/C_4F_8$ gas ratio, the shape of Si microwire can be controlled, resulting in the formation of tapered or vertical microwires. After DRIE process, the residual polymer and etching damage on the surface of the microwires were removed using piranha solution ($H_2SO_4:H_2O_2=4:1$) followed by thermal oxidation ($900^{\circ}C$, 40 min). The oxide layer formed through the thermal oxidation was etched by diluted hydrofluoric acid (1 wt% HF). The surface morphology of a Si microwire arrays was characterized by field-emission scanning electron microscopy (FE-SEM, Hitachi S-4800). Optical reflection measurements were performed over 300~1100 nm wavelengths using a UV-Vis/NIR spectrophotometer (Cary 5000, Agilent) in which a 60 mm integrating sphere (Labsphere) is equipped to account for total light (diffuse and specular) reflected from the samples. The total reflection by the microwire arrays sample was reduced from 20 % to 10 % of the incident light over the visible region when the length of the microwire was increased from $10{\mu}m$ to $30{\mu}m$.

• 청정기술
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• 제20권4호
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• pp.449-456
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• 2014

기후변화로 인한 국지적인 이상가뭄 빈발 및 물수지 관련 불확실성 증가 등으로 각국에서는 사용가능한 담수량 확보, 즉 물안보 문제가 크게 대두되고 있다. 사용가능한 담수량 중 상당부분이 전력을 생산하는 발전 분야에도 사용되기 때문에 그 중요성이 점차 증대하고 있다. 신재생에너지원인 태양광발전은 설비제조, 설치 및 운전의 전 과정(life cycle)에서 수자원을 소비하지만 전통적인 에너지원인 화력발전이나 원자력발전에 비하면 상대적으로 수자원을 적게 사용한다는 장점이 있다. 본 연구에서는 태양광시스템의 원료채취부터 운영발전까지 물 사용량을 알아보기 위해 전 과정의 물 발자국을 측정하여 그 결과를 분석했다. 물 발자국 산정결과 태양광시스템의 전체 물 발자국은 $0.989m^3/MWh$이며, 폴리실리콘과 태양전지 공정에서 물 발자국이 높게 나타났다. 폴리실리콘 공정은 에너지 다소비 공정이기 때문에 냉각수 사용량이 많았고 태양전지 공정에서는 고효율 결정질 실리콘 세척을 위한 탈 이온수(deionized water) 사용량이 많았기 때문에 물 발자국이 높은 것으로 보인다. 태양광발전은 기존 에너지원보다 물 사용량이 적은 발전원임을 확인할 수 있었으며, 에너지 분야의 물 사용량을 절감할 수 있는 가치를 가지고 있음을 알 수 있다. 향후 에너지정책 결정에 있어서 신재생에너지의 부가적인 가치로서 물 발자국 개념의 도입이 중요하다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.219-219
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• 2008

Energy harvesting from the environment has been of great interest as a standalone power source of wireless sensor nodes for ubiquitous sensor networks (USN). There are several power generating methods such as thermal gradients, solar cell, energy produced by human action, mechanical vibration energy, and so on. Most of all, mechanical vibration is easily accessible and has no limitation of weather and environment of outdoor or indoor. In particular, the piezoelectric energy harvesting from ambient vibration sources has attracted attention because it has a relative high power density comparing with other energy scavenging methods. Through recent advances in low power consumption RF transmitters and sensors, it is possible to adopt a micro-power energy harvesting system realized by MEMS technology for the system-on-chip. However, the MEMS energy harvesting system hassome drawbacks such as a high natural frequency over 300 Hz and a small power generation due to a small dimension. To overcome these limitations, we devised a novel power generator with a spiral spring structure. In this case, the energy harvester has a lower natural frequency under 200 Hz than a normal cantilever structure. Moreover, it has higher an energy conversion efficient because shear mode ($d_{15}$) is much larger than 33 mode ($d_{33}$) and the energy conversion efficiency is proportional to the piezoelectric constant (d). We expect the spiral type MEMS power generator would be a good candidate as a standalone power generator for USN.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.11-11
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• 2010

Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제3B권3호
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• pp.147-154
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• 2003

This paper presents a high-frequency boost type ZVS-PWM chopper-fed DC-DC power converter with a single active auxiliary edge-resonant snubber at the load stage which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of boost type ZVS-PWM chopper proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory and the temperature performance of IGBT module, the actual power conversion efficiency, and the EMI of radiated and conducted emissions, and then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn-off mode transition with the aid of an additional lossless clamping diode loop, and can be reduced the EMI conducted emission.

• Current Photovoltaic Research
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• 제10권2호
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• pp.39-48
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• 2022

A Se-containing Cu/SnSe₂/ZnSe precursor was employed to introduce S to the precursor to form Cu₂ZnSn(S,Se)₄ (CZTSSe) film. The morphology of CZTSSe films strongly varied with two different pre-annealing environments: S and N₂. The CZTSSe film with S pre-annealing showed a dense morphology with a smooth surface, while that with N₂ pre-annealing showed a porous film with a plate-shaped grains on the surface. CuS and Cu₂Sn(S,Se)₃ phases formed during the S pre-annealing stage, while SnSe and Cu₂SnSe₃ phases formed during the N₂ pre-annealing stage. The SnSe phase formed during N₂ pre-annealing generated SnS₂ phase that had plate shape and severely aggravated the morphology of CZTSSe film. The power conversion efficiency of the CZTSSe solar cell with S pre-annealing was low (1.9%) due to existence of Zn(S.Se) layer between CZTSSe and Mo substrate. The results indicated that S pre-annealing of the precursor was a promising method to achieve a good morphology for large area application.