• Korean Journal of Materials Research
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• v.34 no.2
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• pp.111-115
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• 2024

Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

• Nuclear Engineering and Technology
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• v.56 no.1
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• pp.195-206
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• 2024

Shenzhen Innovation Light source Facility (SILF) is a 3.0 GeV fourth generation diffraction limited synchrotron light source currently under construction in Shenzhen. The SILF storage ring is proposed to use two 500 MHz single cell superconducting radio frequency (SRF) cavities to provide 2.4 MV RF voltage. In this study, we examined the geometric structure of mature CESR superconducting cavities and adopted a beam-pipe-type extraction scheme for high-order modes (HOM). One of the objectives of SRF cavity design and optimization in this study is to reduce E_p/E_acc and B_p/E_acc as much as possible to reduce power loss and ensure stable operation of the cavity. To reduce the risk of beam instability and thermal breakdown, the HOM and Multipacting (MP) are simulated. Moreover, the mechanical properties of the cavity are analyzed, including frequency sensitivity from pressure of liquid helium (LHe), stress, tuning, Lorentz force detuning (LFD), the microphone effect, and buckling. By comprehensive design and optimization of 500 MHz single-cell SRF cavities, a superconducting cavity for SILF storage ring was developed. This paper will detailed present the design and simulation.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.2
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• pp.99-107
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• 1998

This dissertationhas confirmed the non-flam mability of cast mold transformer that is increasingly used lately. As a research progress, the investigation has been performed on the installation status and each line of the subway system which have the most mold transformer accidents, and the impediment status of the transformer for rectifier and the high-voltage distribution transformer per each manufacturer. Then, a high voltage mold of the actual mold transformer has been installed in the horiwntal heating furnace and the heat has been applied by the standard heating temperature curve of KSF 2257(Fireproof testing meth od of the construction structures: 1993). Accordingly, the combustibility of the mold transformer based on the test results has been found that 78 minutes has been required for the complete burning per the KSF 2257 combustion test curve and that, after stopping the heat application of the horizontal furnace after ignition, the flame progress has not been made but shown as the self-extinguishing characteristics when the flame progress has been checked. Thus, the non-flammability and self-extinguishability of the mold transformer have been confirmed. The result of this dissertation has indicated that the accident involving mold transformer has been progressed and expanded by the dielectric breakdown or void due to the crack in the mold rather than a fire accident caused by a short-circuit or an overload.r an overload.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.8
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• pp.340-346
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• 2002

Capacitor material utilized in the downsizing passive devices and integration of passive devices requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. common capacitor materials, $Al_2O_3$, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$, TaN and et al., used until recently have reached their physical limits in their application to integration of passive devices. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism. This study presents the dielectric properties $Ta_2O_{5}$ MIM capacitor structure Processed by $O_2$ RTA oxidation. X-ray diffraction patterns showed the existence of amorphous phase in $600^{\circ}C$ annealing under the $O_2$ RTA and the formation of preferentially oriented-$Ta_2O_{5}$ in 650, $700^{\circ}C$ annealing and the AES depth profile showed $O_2$ RTA oxidation effect gives rise to the $O_2$ deficientd into the new layer. The leakage current density respectively, at 3~1l$\times$$10_{-2}$(kV/cm) were $10_{-3}$~$10_{-6}$(A/$\textrm{cm}^2$). In addition, behavior is stable irrespective of applied electric field. the frequency vs capacitance characteristic enhanced stability more then $Ta_2O_{5}$ thin films obtained by $O_2$ reactive sputtering. The capacitance vs voltage measurement that, Vfb(flat-band voltage) was increase dependance on the $O_2$ RTA oxidation temperature.

• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.37-45
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• 2003

The dielectric and sintering characteristics of composites made by substituting Ca ion to Ba-site and Zr ion to Ti site in $(Ba{1-x}Ca_x)(Ti{0.96-yZr_ySn_{0.04})O_3$ $(0.15{\leq}x{\leq}0.20,\;0.09{\leq}y{\leq}0.14)$ were investigated. As the content of Ca was more than 15 mol%, composite was formed by precipitating the second phase whose main element was $CaTiO_3$ and the fraction of the second phase was increased. The curie temperature of composites was depended on Ca concentration, $-1.7^{\circ}C$ per mol% and the maximum dielectric constant of composite was decreased by the rate of 200/mol%. The substitution of Zr ion decreased the curie temperature by the rate of $10^{\circ}C$ per mol% and the maximum dielectric constant was decreased by 217/mol% due to the increase of diffuse phase transition. The density and insulation breakdown characteristics were improved by suppressing the abnormal grain growth due to the increase of second phase. We developed the composition of Y5U (EIA standard) condenser which had high breakdown voltage and dielectric constant by controlling diffuse phase transition by the addition of Zr ion into composite.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.55-55
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• 2009

Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.10
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• pp.166-175
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• 2007

Nowadays, the power quality issue becomes very important in the electric distribution system. Especially, when a distribution transformer is replaced, the customers who are supplied electricity from the transformer feel inconvenience due to electric outage. Therefore, an advanced method for the distribution transformer replacement without outage is strongly required. The conventional method is the primary-secondary high voltage bypass method according to the transformer utilization factor and the field condition. But it is inconvenient and has some problems such as breakdown and security troubles of the workers according to the unauthorized and temporary work. Therefore, the new scheme for the replacement with uninterruptable power supply is demanded. This paper proposes the new replacement method using the phase converter. The proposed method can reduces the process of replacement work and also ensures worker's safety. Therefore, the method is reasonable in comparison with the conventional method. The proposed method is able to contribute the national economy growth and elevate the convenience of national life by uninterruptable power supply.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.3
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• pp.344-349
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• 2006

The low-temperature processing is very important for fabrication of the very large scale ($60{\sim}70nm$) semiconductor devices since the submicron transistors are sensitive to the thermal budget. Hence, in this work, we propose a noble low-temperature LPCVD (Low-Pressure Chemical Vapor Deposition) process for the $SiO_2$ film and evaluate the electrical reliability of the LTO (Low-Temperature Oxide) by making the capacitors with ONO (Oxide/Nitride/Oxide) structure. The leak current of the LTO was similar to that of the high-temperature wet oxide until the electric field was lower than 5 MV/cm. However, when the electric field was higher, the LTO showed much better characteristics.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.162-166
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• 2000

High quality $Si_3N_4$ metal-insulator-metal (MIM) capacitors were realized by plasma enhanced chemical vapor deposition (PECVD). Titanium nitride (TiN) adapted as a diffusion barrier reduced the interfacial reaction between $Si_3N_4$ dielectric layer and aluminum metal electrode showing neither hillock nor observable precipitate along the interface. The capacitance and the current-voltage characteristics of the MIM capacitors showed that the minimum thickness of $Si_3N_4$ layer should be limited to 500 $\AA$ under the present process, below which most of the capacitors were electrically shorted resulting in the devastation of on-wafer yield. According to the transmission electron microscopy (TEM) on the cross-sectional microstructure of the capacitors, the dielectric breakdown was caused by slit-like voids formed at the interface between TiN and $Si_3N_4$ layers when the thickness of $Si_3N_4$ layer was less than 500 $\AA$. Based on the calculation of thermally-induced residual stress, the formation of voids was understood from the mechanistic point of view.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.326-326
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• 2010

The dielectric properties of continuous composition spreaded (CCS) $BaTiO_3-SrTiO_3$ (BST) thin filmsgrown at room temperature and annealed at different temperature ($350^{\circ}C$ and $550^{\circ}C$) were investigated. Moreover, electrical properties (leakage current and breakdown voltage) of CCS BST thin films were also investigated. The aluminum top-electrode, sized by $200{\times}200\;{\mu}m2$ and apart from each other by $300\;{\mu}m$, were deposited on the CCS BST thin films by the DC sputtering system. The dielectric properties of the CCS BST thin films were significantly influenced depending on the distance from $BaTiO_3$ and $SrTiO_3$ targets which was attributed to the $BaTiO_3-SrTiO_3$ composition ratio. The maps of dielectric constants and loss tangents were plotted via $1500\;{\mu}m$ - step measuring. The specific points showing the dielectric constant (k: ~300) and loss tangent (tand: ~0.008) at 1 MHz were found.