• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.73-82
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• 2009

This paper proposes a variance recovery method for character strokes that can be missed in applying the previously proposed color variance approach in text detection of natural scene images. The previous method has a shortcoming of missing the color variance due to the fixed length of horizontal and vertical windows of variance detection when the character strokes are thick or long. Thus, this paper proposes a variance recovery method by using geometric information of bounding boxes of connected components and heuristic knowledge. We have tested the proposed method using various kinds of document-style and natural scene images such as billboards, signboards, etc captured by digital cameras and mobile-phone cameras. And we showed the improved text detection accuracy even in the images of containing large characters.

• Journal of information and communication convergence engineering
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• v.9 no.2
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• pp.141-149
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• 2011

We consider the problem of assigning tasks to homogeneous nodes in the distributed system, so as to minimize the amount of communication, while balancing the processors' loads. This issue can be posed as the graph partitioning problem. Given an undirected graph G=(nodes, edges), where nodes represent task modules and edges represent communication, the goal is to divide n, the number of processors, as to balance the processors' loads, while minimizing the capacity of edges cut. Since these two optimization criteria conflict each other, one has to make a compromise between them according to the given task type. We propose a new cost function to evaluate static task assignments and a heuristic algorithm to solve the transformed problem, explicitly describing the tradeoff between the two goals. Simulation results show that our approach outperforms an existing representative approach for a variety of task and processing systems.

• Journal of Korea Society of Industrial Information Systems
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• v.8 no.4
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• pp.38-45
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• 2003

This paper presents a meta-heuristic solution technique, Ant System (AS)algerian to solve edge detection problem. We define the quality of edge in terms of dissimilarity, continuity, thickness and length. We cast edge detection as a problem in cost minimization. This is achieved by the formulation of a cost function that inversely evaluates the quality of edge configuration. Twelve windows for enhancing dissimilarity regions based on the valid edge structures are used. The AS algorithm finds the optimal set of edge pixels based on the cost function. The experimental results show that the properly reduced set of edge pixels could be found regardless how complicated the image is.

• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2973-2979
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• 1998

As this paper is a scheduling algorithm for the synthesis of a pipelined datapath under resource constraints in high level synthesis, the proposed heuristic algorithm uses a priority function based on the collision count of resourecs. In order to schedule the pipelined datapath under resource constraints, we define the collision count and the priority function based on the collision count, a number of resource, and the mobility of operations to resolve a resource collision. The proposed algorithm supports chaining, multicycling, and structural pipelining to design the realistic hardware. The evaluation of the Performance is compared with other systems using the results of the synthesis for a 16point FIR filter and a 5th order elliptic wave filter, where in most cases, the optimal solution is obtained.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1707-1718
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• 1996

Given a signal net N=s, 1,...,n to be the set of nodes, with s the source and the remaining nodes sinks, an MRDPT (minimum-cost rectilinear Steiner distance -preserving tree) has the property that the length of every source to sink path is equal to the rectilinear distance between the source and sink. The minimum- cost rectilinear Steiner distance-preserving tree minimizes the total wore length while maintaining minimal source to sink length. Recently, some heuristic algorithms have been proposed for the problem offending the MRDPT. In this paper, we investigate an optimal structure on the MRDPT and present a theoretical breakthrough which shows that the min-cost flow formulation leads to an efficient O(n2logm)2) time algorithm. A more practical extension is also in vestigated along with interesting open problems.

• The Transactions of the Korea Information Processing Society
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• v.7 no.7
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• pp.2179-2187
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• 2000

This paper provides a heuristic analysis technique which determines an optimal number of V\ulcorner/V\ulcorner pads meeting allowable Simultaneous Switching Noise(SN) budget, early in the design phase. Until now, in determining the number of V\ulcorner/V\ulcorner pads, designers had to simulate packaging models case by case in the design phase or roughly allocate the power/ground pins in an inaccurate way according to typical design rules. However, due to the high density and frequency trends of IC technologies, the V\ulcorner/V\ulcorner pads allocation method can affect an adverse effect on IC operations, which requires more accurate and efficient methods be devised. Thus, this paper proposes an analytic V\ulcorner/V\ulcorner pads calculation method that gives a practical help for packaging designs early in the design phase. The proposed method is applied to a design example of a 1/8x208 pin plastic quad flat package (PQFP) and the results are verified through simulation using HSPICE.

• Journal of Information Processing Systems
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• v.16 no.2
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• pp.460-477
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• 2020

As one of the most significant challenges in the virtual data center, the virtual data center embedding has attracted extensive attention from researchers. The existing research works mainly focus on how to design algorithms to increase operating revenue. However, they ignore the energy consumption issue of the physical data center in virtual data center embedding. In this paper, we focus on studying the energy-aware virtual data center embedding problem. Specifically, we first propose an energy consumption model. It includes the energy consumption models of the virtual machine node and the virtual switch node, aiming to quantitatively measure the energy consumption in virtual data center embedding. Based on such a model, we propose two algorithms regarding virtual data center embedding: one is heuristic, and the other is based on particle swarm optimization. The second algorithm provides a better solution to virtual data center embedding by leveraging the evolution process of particle swarm optimization. Finally, experiment results show that our proposed algorithms can effectively save energy while guaranteeing the embedding success rate.

• The Transactions of the Korea Information Processing Society
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• v.2 no.3
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• pp.425-432
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• 1995

In this paper we propose a design and implementation technique of a universal automatic test pattern generator(UATPG) which is well suited for VLSI digital circuits. UATPG is designed to extend the capabilities of the existing APTG and to provide a convenient environment to computer-aided design(CAD) users. We employ heuristic techniques in line justification and fault propagation for functional gates during test pattern generation for a target fault. In addition, the flip-flops associated with design for testability (DFT) are exploited for pseudo PIs and pseudo POs to enhance the testabilities of VLSI circuits. As a result, UATPG shows a good enhancement in convenient usage and performance.

• Journal of Information Processing Systems
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• v.13 no.4
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• pp.1000-1013
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• 2017

Clustering is a NP-hard problem that is used to find the relationship between patterns in a given set of patterns. It is an unsupervised technique that is applied to obtain the optimal cluster centers, especially in partitioned based clustering algorithms. On the other hand, cat swarm optimization (CSO) is a new meta-heuristic algorithm that has been applied to solve various optimization problems and it provides better results in comparison to other similar types of algorithms. However, this algorithm suffers from diversity and local optima problems. To overcome these problems, we are proposing an improved version of the CSO algorithm by using opposition-based learning and the Cauchy mutation operator. We applied the opposition-based learning method to enhance the diversity of the CSO algorithm and we used the Cauchy mutation operator to prevent the CSO algorithm from trapping in local optima. The performance of our proposed algorithm was tested with several artificial and real datasets and compared with existing methods like K-means, particle swarm optimization, and CSO. The experimental results show the applicability of our proposed method.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.289-293
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• 2000

We propose two new algorithms for parallelism-independent scheduling. The machine code generated from the compiler using these algorithms in its scheduling phase is parallelism-independent code, executable in minimum time regardless of the number of the processors in the parallel computer. Our new algorithms have the following phases: finding the minimum number of processors on which the program can be executed in minimal time, scheduling by an heuristic algorithm for this predefined number of processors, and serialization of the parallel schedule according to the earliest start time of the tasks. At run time tasks are taken from the serialized schedule and assigned to the processor which allows the earliest start time of the task. The order of the tasks decided at compile time is not changed at run time regardless of the number of the available processors which means there is no out-of-order issue and execution. The scheduling is done predominantly at compile time and dynamic scheduling is minimized and diminished to allocation of the tasks to the processors. We evaluate the proposed algorithms by comparing them in terms of schedule length to the CP/MISF algorithm. For performance evaluation we use both randomly generated DAGs (directed acyclic graphs) and DACs representing real applications. From practical point of view, the algorithms we propose can be successfully used for scheduling programs for in-order superscalar processors and shared memory multiprocessor systems. Superscalar processors with any number of functional units can execute the parallelism-independent code in minimum time without necessity for dynamic scheduling and out-of-order issue hardware. This means that the use of our algorithms will lead to reducing the complexity of the hardware of the processors and the run-time overhead related to the dynamic scheduling.