• 한국신재생에너지학회:학술대회논문집
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• 2011.11a
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• pp.47.2-47.2
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• 2011

High-efficient transparent conductive oxide (TCO) film-embedding Si heterojunction solar cells were fabricated. An improved crystalline indium-tin-oxide (ITO) film was grown on an Al-doped ZnO (AZO) template upon hetero-epitaxial growth. This double TCO-layered Si solar cell provided significantly enhanced efficiency of 9.23 % as compared to the single TCO/Si devices. The effective arrangement of TCO films (ITO/AZO) provides a good interface, resulting in the enhanced photovoltaic performances. It discusses TCO film arrangement scheme for efficient TCO-layered heterojunction solar cells.

• Korean Journal of Materials Research
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• v.33 no.12
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• pp.525-529
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• 2023

β-Ga₂O₃ has become the focus of considerable attention as an ultra-wide bandgap semiconductor following the successful development of bulk single crystals using the melt growth method. Accordingly, homoepitaxy studies, where the interface between the substrate and the epilayer is not problematic, have become mainstream and many results have been published. However, because the cost of homo-substrates is high, research is still mainly at the laboratory level and has not yet been scaled up to commercialization. To overcome this problem, many researchers are trying to grow high quality Ga₂O₃ epilayers on hetero-substrates. We used diluted SiH4 gas to control the doping concentration during the heteroepitaxial growth of β-Ga₂O₃ on c-plane sapphire using metal organic chemical vapor deposition (MOCVD). Despite the high level of defect density inside the grown β-Ga₂O₃ epilayer due to the aggregation of random rotated domains, the carrier concentration could be controlled from 1 × 10¹⁹ to 1 × 10¹⁶ cm^-3 by diluting the SiH4 gas concentration. This study indicates that β-Ga₂O₃ hetero-epitaxy has similar potential to homo-epitaxy and is expected to accelerate the commercialization of β-Ga₂O₃ applications with the advantage of low substrate cost.

• Bulletin of the Korean Chemical Society
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• v.35 no.2
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• pp.569-574
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• 2014

Inverted bulk hetero-junction polymer solar cells (iPSC) composed of P3HT/PC61BM blends on the ZnO modified with benzoic acid derivatives-based self-assembled monolayers (SAM) are fabricated. Compared with the device using the pristine ZnO, the devices with ZnO surface modified SAMs derived from benzoic acid such as 4-(diphenylamino)benzoic acid (DPA-BA) and 4-(9H-carbazol-9-yl)benzoic acid (Cz-BA) as an electron transporting layer show improved the performances. It is mainly attributed to the favorable interface dipole at the interface between ZnO and the active layer, the eective passivation of the ZnO surface traps, decrease of the work function and facilitating transport of electron from PCBM to ITO electrode. The power conversion eciency (PCE) of iPSCs based on DPA-BA and Cz-BA treated ZnO reaches 2.78 and 2.88%, respectively, while the PCE of the device based on untreated ZnO is 2.49%. The open circuit voltage values ($V_{oc}$) of the devices with bare ZnO and SAM treated ZnO are not much different. Whereas, higher the fill factor (FF) and lower the series resistance ($R_s$) are obtained in the devices with SAMs modification.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.12
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• pp.2926-2932
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• 2014

Smart Phone market consists of several platforms such as Windows Phone, Apple iOS and Android of Google. Each platform uses different coding style respectively. Platform-dependent application results in high cost and low code reusability during development of application. It also provides heterogeneous display forms to users. In this paper, we propose a platform-independent generic interface model that could be operated in both the various smart phones and PC. Because the proposed model provides the same UI on multiple platforms, users can operate applications without awkwardness. The model includes a module which copes with the changes of the resolutions in various platforms and a module which switches scenes of each application for performance improvement. Moreover, a module which connects DB is also proposed in order to overcome the difference of way to store data in each platform. The implementation results show that the difference of display and operating manner in any hetero-platform is eliminated.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.188.2-188.2
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• 2015

The presence of the conduction interface in epitaxial $LaAlO_3/SrTiO_3$ thin films has opened up challenging applications which can be expanded to next-generation nano-electronics. The metallic conduction path is associated with two adjacent insulating materials. Such device structure is applicable to frequency-dependent impedance spectroscopy. Impedance spectroscopy allows for simultaneous measurement of resistivity and dielectric constants, systematic identification of the underlying electrical origins, and the estimation of the electrical homogeneity in the corresponding electrical origins. Such unique capability is combined with the intentional control on the interface composition composed of $SrTiO_3$ and $CaTiO_3$, which can be denoted by $SrxCa1-_xTiO_3$. The underlying $Sr_xCa1-_xTiO_3$ interface was deposited using pulsed-laser deposition, followed by the epitaxial $LaAlO_3$ thin films. The platinum electrodes were constructed using metal shadow masks, in order to accommodate 2-point electrode configuration. Impedance spectroscopy was performed as the function of the relative ratio of Sr to Ca. The respective impedance spectra were analyzed in terms of the equivalent circuit models. Furthermore, the impedance spectra were monitored as a function of temperature. The ac-based characterization in the 2-dimensional conduction path supplements the dc-based electrical analysis. The artificial manipulation of the interface composition will be discussed towards the electrical application of 2-dimensional materials to the semiconductor devices in replacement for the current Si-based devices.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.31 no.6
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• pp.233-239
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• 2021

In this study, Ga₂O₃/diamond layers were grown on Si substrates to improve the thermal characteristics of Ga₂O₃ materials. Firstly, diamond thin film was grown on Si substrates by hot-filament chemical vapor deposition. Afterward, Ga₂O₃ layer was grown in the growth temperature range of from 450~600℃ by mist chemical vapor deposition. We found that layer separation happens at the Ga₂O₃/diamond interface at the growth temperature of 500℃. This is attributed to the different thermal expansion coefficient of the mixture of amorphous and crystalline structures during cooling process. Therefore, this study might contribute to the heat-sink-layer bonded power semiconductor applications by stabilizing the thermal properties at Ga₂O₃/diamond interface.

• ETRI Journal
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• v.27 no.5
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• Journal of the Korean Vacuum Society
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• v.10 no.3
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• pp.350-355
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• 2001

We have investigated characteristics of ZnSe epilayer grown by molecular beam epitaxy(MBE) on semi-insulating(SI) GaAs by using surface photovoltage(SPV). The measurements of SPV were performed with illumination intensity and modulation frequency. The bandgap energy of ZnSe epilayer was determined from derivative surface photovoltage (DSPV). The five states were observed at room temperature(RT), and those states relate to the impurity and defect formed hetero-interface of ZnSe and GaAs during the sample growth. The observed states represented as a tendency of typical extrinsic transition on the increasing illumination intensity. The 1s and 2s signals related to the excitonic absorption were not observed at RT, but those were presented with the splitted of two peaks in the SPV at 80 K. From the modulation frequency dependence, we obtained the junction conductance and capacitance of the sample.

• Transactions on Electrical and Electronic Materials
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• v.6 no.3
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• pp.124-127
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• 2005

It has been a long time since organic solar cells were expected as a low-cost energy-conversion device. Although practical use of them has not been achieved, technological progress continues. Morphology of the materials, organic/inorganic interface, metal cathodes, molecular packing and structural properties of the donor and acceptor layers are essential for photovoltaic response. We have fabricated solar cell devices based on zinc-phthalocyanine(ZnPc) as donor(D) and fullerene$(C_60)$ as electron acceptor(A) with doped charge transport layers, and BCP and $Alq_3$ as an exciton blocking layer(EBL). We have measured the photovoltaic characteristics of the solar cell devices using the Xe lamp as a light source. We were use of $Alq_3$ layer leads to external power conversion efficiency was $2.65\%$ at illumination intensity $100\;mW/cm^2$. Also we confirmed the optimum thickness ratio of the DA hetero-junction is about 1:2.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.4
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• pp.367-370
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• 2004

We fabricated SiGe BiCMOS devices, which are important for ultra high speed RF IC chips, by employing $0.35\mu{m}$ CMOS process. To meet with the requirement of low noise level with linear base leakage current at low VBE region, we try to minimize polysilicon/ silicon interface traps by optimizing capping silicon thickness and EDR(emitter drive-in RTA) temperature. We employed $200\AA$and $300\AA$-thick capping silicon, and varied the EDR process condition at temperature of $900-1000^\circ{C}$, and time of 0-30 sec at a given capping silicon thickness. We investigated current gain behavior at each process condition. We suggest that optimum EDR process condition would be $975^\circ{C}$-30 sec with $300\AA$-thick capping silicon for proposed $0.35\mu{m}$-SiGe HBT devices.