• Journal of Advanced Marine Engineering and Technology
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• 제19권1호
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• pp.71-81
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• 1995

In this paper, a new speed control scheme for induction motor drives that regular sampled PWM and harmonic elimination switching pattern over the full range of output speed is presented. The proposed scheme(hybrid scheme) provides three mode and guarantees smooth voltage boost. A detailed description of the scheme, along with the relalization aspect, is described. Moreover, methods of compensating for dead time and optical transmission system of drive signal are proposed and investigated. Finally, experimental investigation of hybrid scheme is presented.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.688-692
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• 1988

The active filter system for harmonic current compensation is presented in this paper. The active filter, composed of a three-phase voltage-type PWM inverter and the capacitor, compensates both the harmonic currents and the reactive power by injecting the PWM current to the ac line. This paper describes the principle of harmonic current compensation, the calculation circuits for the harmonic currents to be injected, the several compensation characteristics. Also the experimental results are shown to verify the theory proposed in this paper.

• Journal of Power Electronics
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• 제11권2호
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• pp.132-139
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• 2011

The selective harmonic elimination pulse width modulation (SHEPWM) switching strategy has been applied to multilevel inverters to remove low harmonics. Naturally, the related equations do not have feasible solutions for some operating points associated with the modulation index (M). However, with these infeasible points, minimizing instead of eliminating harmonics is performed. Thus, harmful harmonics such as the $5^{th}$ harmonic still remains in the output waveform. Therefore, it is proposed in this paper to ignore solving the equation associated with the highest order harmonics. A reduction in the eliminated harmonics results in an increase in the degrees of freedom. As a result, the lower order harmonics are eliminated in more operating points. A 9-level inverter is chosen as a case study. The genetic algorithm (GA) for optimization purposes is used. Simulation results verify the proposed method.

• Journal of Power Electronics
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• 제15권6호
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• pp.1508-1516
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• 2015

A single phase H-bridge inverter is employed in conventional Inductive Power Transfer (IPT) systems as the primary side power supply. These systems may not be suitable for some high power applications, due to the constraints of the power electronic devices and the cost. A high-frequency cascaded multi-level inverter employed in IPT systems, which is suitable for high power applications, is presented in this paper. The Phase Shift Pulse Width Modulation (PS-PWM) method is proposed to realize power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage to avoid solving non-linear transcendental equations. The validity of the proposed control approach is verified by the experimental results obtained with a 2kW prototype system. This approach is expected to be useful for high power IPT applications, and the output power of each H-bridge unit is identical by the proposed approach.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.1-4
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• 2003

This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.

• Journal of Power Electronics
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• 제10권1호
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• pp.43-50
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• 2010

This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

• 대한전자공학회논문지TC
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• 제46권1호
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• pp.102-106
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• 2009

본 논문은 EER(Envelope Elimination and Restoration)에 적용된 class F 전력 증폭기의 드레인 전압의 변화에 따른 출력 정합회로의 최적화에 대하여 연구하였다. EER 구조에 적용된 class F PA의 PAE(Power Added Efficiency)를 개선하기 위해 고조파 조정 회로에 Varactor 다이오드를 사용하였다. 포락선의 변화에 따라 2차 고조파는 단락 시키고 3차 고조파는 개방 시키도록 설계되었으며 본 논문에서 제안된 고조파 조정 회로를 통해 드레인 전압이 25 V에서 30 V까지 변화할 때 수 %의 PAE 개선 효과를 얻을 수 있었다.

• Journal of Power Electronics
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• 제14권3호
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• pp.488-498
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• 2014

This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1682-1691
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• 2015

In this paper, a real time implementation of selective harmonic elimination pulse width modulation (SHEPWM) using Real Coded Genetic Algorithm (RGA), Particle Swarm Optimization technique (PSO) and a new technique known as Linearization Method (LM) for Single Phase Matrix Converter (SPMC) is designed and discussed. In the proposed technique, the switching frequency is fixed and the optimum switching angles are obtained using simple mathematical calculations. A MATLAB simulation was carried out, and FFT analysis of the simulated output voltage waveform confirms the effectiveness of the proposed method. An experimental setup was also developed, and the switching angles and firing pulses are generated using Field Programmable Gate Array (FPGA) processor. The proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real time applications.

• 한국정보통신학회논문지
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• 제7권8호
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• pp.1751-1758
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• 2003

본 논문에서는 V55 마이크로프로세서로 제어되는 반브릿지 인버터를 사용하여 영구 콘덴서형 단상유도 전동기의 가변속 구동에 대해 연구하였다. Patel의 알고리즘을 이용한 SHE(Selected Harmonic Elimination) PWM 구동방식에 의한 V/F 제어로 출력전압의 고조파분을 제거할 수 있으며, 속도의 제어 범위가 넓어짐을 알 수 있었다. 제안한 방법을 시뮬레이션과 실험의 결과로 입증하였다.