• 제목/요약/키워드: Hardware limitation

검색결과 142건 처리시간 0.032초

Performance Analysis of Full Duplex on-regenerative Relay

  • Ban, Tae-Won;Jung, Bang-Chul
    • Journal of information and communication convergence engineering
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    • 제9권6호
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    • pp.647-651
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    • 2011
  • In this letter, non-regenerative Amplify-and-Forward (AF) relay systems based on half and full duplex schemes are investigated and their performance is analyzed and compared in terms of outage probability. Although the AF relay systems have been widely investigated in many previous literatures, most of them adopted a half duplex scheme due to hardware limitation and mathematical tractability. To the best of our knowledge, this letter is the first study to investigate the performance of the full duplex AF relay system considering practical hardware limitations. In full duplex AF relay systems, it is important to secure the isolation between transmit and receive antennas. Our numerical and simulation results show that there exists a threshold point of the isolation gain that the full duplex relay system outperforms the half duplex relay system.

Efficient Native Processing Modules for Interactive DTV Middleware Based on the Small Footprint Set-Top Box

  • Shin, Sang-Myeong;Im, Dong-Gi;Jung, Min-Soo
    • 한국멀티미디어학회논문지
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    • 제9권12호
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    • pp.1617-1627
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    • 2006
  • The concept of middleware for digital TV receivers is not new one. Using middleware for digital TV development has a number of advantages. It makes it easier for manufacturers to hide differences in the underlying hardware. It also offers a standard platform for application developers. Digital TV middleware enables set-top boxes(STBs) to run video, audio, and applications. The main concern of digital TV middleware is now to reduce its memory usage because most STBs in the market are small footprint. In this paper, we propose several ideas about how to reduce the required memory size on the runtime area of DTV middleware using a new native process technology. Our proposed system has two components; the Efficient Native Process Module, and Enhanced Native Interface APIs for concurrent native modules. With our approach, the required memory reduced from 50% up to 75% compared with the traditional approach. It can be suitable for low end STBs of very low hardware limitation.

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모바일 로봇 모션 제어에 있어 샘플링 시간의 효과 (Effects of the Sampling Time in Motion Controller Implementation for Mobile Robots)

  • 장태호;김영식
    • 산업경영시스템학회지
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    • 제37권4호
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    • pp.154-161
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    • 2014
  • In this research we investigate motion controller performance for mobile robots according to changes in the control loop sampling time. As a result, we suggest a proper range of the sample time, which can minimize final posture errors while improving tracking capability of the controller. For controller implementation into real mobile robots, we use a smooth and continuous motion controller, which can respect robot's path curvature limitation. We examine motion control performance in experimental tests while changing the control loop sampling time. Toward this goal, we compare and analyze experimental results using two different mobile robot platforms; one with real-time control and powerful hardware capability and the other with non-real-time control and limited hardware capability.

Hybrid Sinusoidal-Pulse Charging Method for the Li-Ion Batteries in Electric Vehicle Applications Based on AC Impedance Analysis

  • Hu, Sideng;Liang, Zipeng;He, Xiangning
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.268-276
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    • 2016
  • A hybrid sinusoidal-pulse current (HSPC) charging method for the Li-ion batteries in electric vehicle applications is proposed in this paper. The HSPC charging method is based on the Li-ion battery ac-impedance spectrum analysis, while taking into account the high power requirement and system integration. The proposed HSPC method overcomes the power limitation in the sinusoidal ripple current (SRC) charging method. The charger shares the power devices in the motor inverter for hardware cost saving. Phase shifting in multiple pulse currents is employed to generate a high frequency multilevel charging current. Simulation and experimental results show that the proposed HSPC method improves the charger efficiency related to the hardware and the battery energy transfer efficiency.

CCIX 연결망과 메모리 확장기술 동향 (Trends of the CCIX Interconnect and Memory Expansion Technology)

  • 김선영;안후영;전성익;박유미;한우종
    • 전자통신동향분석
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    • 제37권1호
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    • pp.42-52
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    • 2022
  • With the advent of the big data era, the memory capacity required for computing systems is rapidly increasing, especially in High Performance Computing systems. However, the number of DRAMs that can be used in a computing node is limited by the structural limitations of the hardware (for example, CPU specifications). Memory expansion technology has attracted attention as a means of overcoming this limitation. This technology expands the memory capacity by leveraging the external memory connected to the host system through hardware interface such as PCIe and CCIX. In this paper, we present an overview and describe the development trends of the memory expansion technology. We also provide detailed descriptions and use cases of the CCIX that provides higher bandwidth and lower latency than cases of the PCIe.

정형 기법을 이용한 하드웨어 AES 모듈 백도어 탐색 연구 (Study of Hardware AES Module Backdoor Detection through Formal Method)

  • 박재현;김승주
    • 정보보호학회논문지
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    • 제29권4호
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    • pp.739-751
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    • 2019
  • 임베디드 기기의 보안성이 주요한 문제로 부상하고 있다. 관련된 문제 중 특히 공급망 공격은 국가 간의 분쟁으로 이어질 수 있어 심각한 문제로 대두되고 있다. 공급망 공격을 완화하기 위하여 하드웨어 구성요소, 특히 AES와 같은 암호 모듈에 대한 CC(Common Criteria) EAL(Evaluation Assurance Level) 5 이상 고등급 보안성 인증 및 평가가 필요하다. 고등급 보안성 인증 및 평가를 위하여 암호 모듈에 대한 은닉 채널, 즉 백도어를 탐지하는 것이 필요하다. 그러나 기존의 연구로는 암호 모듈 그 중 AES의 비밀 키를 복구시킬 수 있는 정보가 유출되는 백도어를 탐지하지 못하는 한계가 있다. 따라서 본 논문은 기존의 하드웨어 AES 모듈 백도어의 정의를 확장하여 개선시킨 새로운 정의를 제안하고자 한다. 또한, 이 정의를 이용하여 기존 연구가 탐지하지 못했던 백도어를 탐색하는 과정을 제시한다. 이 탐색 과정은 Verilog HDL (Hardware Description Language)로 표현된 AES 모듈을 정형 기법 도구인 모델 체커(Model Checker) NuSMV를 이용하여 검증하는 것으로 백도어를 탐색한다.

MR Spiral scan 영상에서 Gradient system의 모델링을 이용한 Eddy current compensation (Eddy current compensation using a gradient system modeling in MR Spiral scan imaging)

  • 조상흠;김판기;강승원;안창범
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.339-340
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    • 2007
  • Gradient system에 spiral waveform 입력을 가하면 Hardware limitation에 의하여 만들어지는 gradient fields에 Transient time delay가 발생한다. 이를 보상하기 위하여, Gradient system을 R-L-C 회로로 모델링하여 재구성에 필요한 k-space trajectory를 보정하여 개선된 image를 획득하였다.

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심층 패킷검사를 위한 정규표현식 패턴매칭 하드웨어 구조 (A Hardware Architecture of Regular Expression Pattern Matching for Deep Packet Inspection)

  • 윤상균;이규희
    • 한국컴퓨터정보학회논문지
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    • 제16권5호
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    • pp.13-22
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    • 2011
  • 최근의 네트워크 침입탐지 시스템들은 침입패턴을 나타내는 데 정규표현식을 사용하고 있으며 빠른 심층 패킷 검사를 위해서 하드웨어 기반의 패턴매칭이 필요하다. 하드웨어 기반 정규표현식 패턴매칭에 대한 많은 연구가 이루어졌으나 {10}과 같은 제한반복 연산자에 대한 구현은 제약이 있었다. 본 논문에서는 일반적인 정규표현식 서브패턴에 대한 제한반복을 더 낮은 하드웨어 복잡도로 구현할 수 있는 제한반복 블록 구조를 제시하였다. 제안된 제한반복 블록은 단일 문자, 고정길이 문자 뿐 만 아니라 일반적인 정규표현식 서브패턴의 제한반복 구현도 가능하다. 제안된 제한반복 블록 구조는 모든 제한반복을 펼치지 않고 구현할 수 있도록 하여 정규표현식 패턴매칭 하드웨어를 더 효율적으로 구현할 수 있도록 하였다.

오픈소스하드웨어를 이용한 침상머리각도 측정 시스템의 래피드 프로토타이핑 (Rapid Prototyping of Head-of-Bed Angle Measurement System using Open-Source Hardware)

  • 조봉언;박영상;서숙길;김진걸;이영삼
    • 제어로봇시스템학회논문지
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    • 제21권11호
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    • pp.1038-1043
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    • 2015
  • When the study on the relationship between the Head-of-Bed (HOB) angle and ventilator-associated pneumonia is performed, the fact that the HOB angle can only be measured intermittently imposes a significant limitation on the study. Therefore, there has been demand for the development of a device that can measure the HOB angle continuously. In this paper, we propose the rapid prototyping of an HOB measurement system using open-source hardware and software. The proposed system helps to maintain the HOB angle at a particular angle by displaying the angle and helps the medical study of pneumonia patients by enabling continuous data acquisition. Firstly, we eliminate the process of making an MCU board by utilizing an open-source hardware mbed LPC1768. Secondly, we reduce the software development time by using libraries and hence enabling the easy use of peripherals. Thirdly, for rapid prototyping, we build the enclosure of the proposed system using a 3D printer. The proposed system can be attached and detached to and from a bed. Therefore, we can attach it to the bed of a patient for whom measurement of the HOB angle is necessary. Finally, we check the measurement performance and the validity of the proposed system through an experiment utilizing an incremental encoder.

AUTOSAR 플랫폼 기반 CDD를 활용한 비휘발성 메모리 수명 연장 기법 (A Non-volatile Memory Lifetime Extension Scheme Based on the AUTOSAR Platform using Complex Device Driver)

  • 신주석;손정호;이은령;오세진;안광선
    • 대한임베디드공학회논문지
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    • 제8권5호
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    • pp.235-242
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    • 2013
  • Recently, the number of automotive electrical and electronic system has been increased because the requirements for the convenience and safety of the drivers and passengers are raised. In most cases, the data for controlling the various sensors and automotive electrical and electronic system used in runtime should be stored on the internal or external non-volatile memory of the ECU(Electronic Control Units). However, the non-volatile memory has a constraint with write limitation due to the hardware characteristics. The limitation causes fatal accidents or unexpected results if the non-volatile memory is not managed. In this paper, we propose a management scheme for using non-volatile memory to prolong the writing times based on AUTOSAR(AUTOmotive Open System Architecture) platform. Our proposal is implemented on the CDD(Complex Device Driver) and uses an algorithm which swaps a frequently modified block for a least modified block. Through the development of the prototype, the proposed scheme extends the lifetime of non-volatile memory about 1.08 to 2.48 times than simply using the AUTOSAR standard.