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http://dx.doi.org/10.9708/jksci.2011.16.5.013

A Hardware Architecture of Regular Expression Pattern Matching for Deep Packet Inspection  

Yun, Sang-Kyun (Dept. of Computer and Telecommunication Engineering, Yonsei University)
Lee, Kyu-Hee (Dept. of Computer and Telecommunication Engineering, Yonsei University)
Abstract
Network Intrusion Detection Systems use regular expression to represent malicious packets and hardware-based pattern matching is required for fast deep packet inspection. Although hardware architectures for implementing constraint repetition operators such as {10} were recently proposed, they have some limitation. In this paper, we propose hardware architecture supporting constraint repetitions of general regular expression sub-patterns with lower logic complexity. The subpatterns supported by the proposed contraint repetition architecture include general regular expression patterns as well as a single character and fixed length patterns. With the proposed building block, we can implement more efficiently regular expression pattern matching hardwares.
Keywords
packet inspection; intrusion detection; pattern matching H/W; regular expression; NIDS;
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