• Electronics and Telecommunications Trends
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• v.36 no.6
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• pp.1-12
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• 2021

As the demand for big data and big data-based artificial intelligence (AI) technology increases, the need for privacy preservations for sensitive information contained in big data and for high-speed encryption-based AI computation systems also increases. Fully homomorphic encryption (FHE) is a representative encryption technology that preserves the privacy of sensitive data. Therefore, FHE technology is being actively investigated primarily because, with FHE, decryption of the encrypted data is not required in the entire data flow. Data can be stored, transmitted, combined, and processed in an encrypted state. Moreover, FHE is based on an NP-hard problem (Lattice problem) that cannot be broken, even by a quantum computer, because of its high computational complexity and difficulty. FHE boasts a high-security level and therefore is receiving considerable attention as next-generation encryption technology. However, despite being able to process computations on encrypted data, the slow computation speed due to the high computational complexity of FHE technology is an obstacle to practical use. To address this problem, hardware technology that accelerates FHE operations is receiving extensive research attention. This article examines research trends associated with developments in hardware technology focused on accelerating the operations of representative FHE schemes. In addition, the detailed structures of hardware that accelerate the FHE operation are described.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2001.12a
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• pp.255-258
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• 2001

This paper is implementation of cellular automata neural network system which is a living creatures' brain using evolving hardware concept. Cellular automata neural network system is based on the development and the evolution, in other words, it is modeled on the ontogeny and phylogeny of natural living things. The proposed system developes each cell's state in neural network by CA. And it regards code of CA rule as individual of genetic algorithm, and evolved by genetic algorithm. In this paper we implement this system using evolving hardware concept Evolving hardware is reconfigurable hardware whose configuration is under the control of an evolutionary algorithm. We design genetic algorithm process for evolutionary algorithm and cells in cellular automata neural network for the construction of reconfigurable system. The effectiveness of the proposed system is verified by applying it to time-series prediction.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.2
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• pp.37-46
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• 1996

This paper proposes a cost-effective solution to the synonym problem of virtual caches. In the proposed solution, a minimal hardware addition guarantees the correctness whereas the software counterpart helps improve the performance. The key to this proposed solution is an addition of a small physically-indexed cache called U-cache. The U-cache maintains the reverse translation information of the cache blocks that belong to unaligned virtual pages only, where aligned measns that the lower bits of the virtual page number match those of the corresponding physical page number. The page alignment is a simple software optimization to improve the performance of the U-cche hardware. With the combination of both hardware and software, the proposed solution reduces the hardware costs and minimizes software modification and performance degradation. Performance evaluation base on ATUM traces shows that a U-cache, with only a few entries, performs almost as well as fully-configured hardware-based solution when more than 95% of the pages are aligned.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.144-147
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• 2000

Data security is an important issue in today's computer networks. In order to construct a safe infra in the open communication network, a cryptography is necessarily applied to several communication application fields like a high-speed networking system supporting real-time operation. A cryptography which has already realized by a software is designed by using a hardware to improve a throughput. In this paper, we design hardware architecture of IDEA by using a single iterative round method to improve a encryption throughput. In addition, we intend to develop a hardware design methodology that a specific cryptography operate with high-speed. The hardware model is described in VHDL and synthesized by the Samsung KG 80 Library in the Synopsys development software tool. With a system clock frequency 20MHz, this hardware permits a data conversion rate of more than 116 Mbit/s.

• Journal of Power Electronics
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• v.6 no.2
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• pp.114-120
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• 2006

This paper compares two types of direct torque controllers for permanent magnet synchronous motors(PMSMs). These controllers both use a single-chip FPGA(Field Programmable Gate Array) but have differing hardware configurations. One of the controllers was constructed by programming a soft-core CPU and hardware logic circuits written in VHDL(Very high speed IC Hardware Description Language), while the other was constructed of only hardware logic circuits. The characteristics of these two controllers were compared in this paper. The results show the controller constructed of only hardware logic circuits was able to shorten the control period and it was able to suppress the low torque ripple.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.67-68
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• 2009

Increasing use of embedded systems has made many improvements on hardware development for specific purpose. Hardware changes are more expensive and harder to implement rather than software changes. Developers need tools to do design and testing of new hardware. Many simulation tools have been made to mimic the hardware and allow developer to test programs on top of new hardware. Virtual Development Environment for Embedded Software (VDEES) is one of the alternatives available. It provides an open source based platform and an Integrated Development Environment (IDE) that can be used to build and testing newly made component, faster and at low-cost.

• Journal of Digital Convergence
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• v.14 no.11
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• pp.501-505
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• 2016

Recently, the frequency of dealing important information regarding financial services like paying through smart device or internet banking on smart device has been increasing. Also, with the development of smart device execution environment towards open software environment, it became easier for users to download and use random application software, and its security aspect appears to be weakening. This study inspects features of hardware-based smart device security technology. Furthermore, this study proposes a realization method in MTM hardware-based secure smart device execution environment for an application software that runs in smart devices. While existing MTM provides the root of trust function only for the mobile device, the MTM-based mobile security environment technology proposed in this paper can provide numerous security functions that application program needs in mobile device. The further researches on IoT devices that are compatible with security hardware, gateway security technology and methods that secure reliability and security applicable to varied IoT devices by advancing security hardware are the next plan to proceed.

• ETRI Journal
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• v.26 no.6
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• pp.535-544
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• 2004

With video compression standards such as MPEG-4, a transmission error happens in a video-packet basis, rather than in a macroblock basis. In this context, we propose a semantic error prioritization method that determines the size of a video packet based on the importance of its contents. A video packet length is made to be short for an important area such as a facial area in order to reduce the possibility of error accumulation. To facilitate the semantic error prioritization, an efficient hardware algorithm for face tracking is proposed. The increase of hardware complexity is minimal because a motion estimation engine is efficiently re-used for face tracking. Experimental results demonstrate that the facial area is well protected with the proposed scheme.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.4 no.1
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• pp.7-11
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• 2004

This paper proposes a new immunotronic approach for the fault detection in hardware. The suggested method is, inspired by biology and its implementation is based on genetic algorithm. Tolerance conditions in the immunotronic system for fault detection correspond to the antibodies in the biological immune system. A novel algorithm of generating tolerance conditions is suggested based on the principle of the antibody diversity and GA optimization is employed to select mature tolerance conditions in immunotronic fault detection system. The suggested method is applied to the fault detection for MCNC benchmark FSMs (finite state machines) and its effectiveness is demonstrated by the computer simulation.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1729-1734
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• 2005

The use of gantry crane systems for transporting payload is very common in industrial application. However, moving the payload using the crane is not an easy task especially when strict specifications on the swing angle and on the transfer time need to be satisfied. To overcome this problem, this paper describes development of an intelligent gantry crane system based on the mechatronic design. A lab-scale gantry crane is designed and then its intelligent controllers are developed. Fuzzy logic controllers are adopted, designed and implemented for controlling payload position as well as the swing angle of the gantry crane. The performance of the intelligent gantry crane system is evaluated on a hardware-in-the-loop simulation (HILS) environment. Moreover robustness of the proposed system is also evaluated. The result shows that the intelligent gantry crane system designed based on the mechatronic design approach has better performance compared with the automatic gantry crane system controlled by classical PID controllers. Moreover simulation result shows that the intelligent gantry crane system is more robust to parameter variation than the automatic gantry crane system.