• Title/Summary/Keyword: Hardware Resources

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A Study on SoC Platform Design Supporting Dynamic Cooperation between Hardware and Software Modules (하드웨어 및 소프트웨어 모듈간의 동적 협업을 지원하는 SoC 플랫폼 설계에 관한 연구)

  • Lee, Dong-Geon;Kim, Young-Mann;Tak, Sung-Woo
    • Journal of Korea Multimedia Society
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    • v.10 no.11
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    • pp.1446-1459
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    • 2007
  • This paper presents and analyzes a novel technique that makes it possible to improve the performance of low-end embedded systems through SoC(System-on-a-Chip) platform supporting dynamic cooperation between hardware and software modules. Traditional embedded systems with limited hardware resources have the poor capability of carrying out multi-tasking jobs including complex calculations. The proposed SoC platform, which provides dynamic cooperation between hardware and software modules, decomposes a single specific system into tasks for given system requirements. Additionally, we also propose a technique for efficient communication and synchronization between hardware and software tasks in cooperation with each other. Several experiments are conducted to illustrate the application and efficiency of the proposed SoC platform. They show that the proposed SoC platform outperforms the traditional embedded system, where only software tasks run, as the number of memory access is increased and the system become more complex.

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Performance Comparison between Hardware & Software Cache Partitioning Techniques (하드웨어 캐시 파티셔닝과 소프트웨어 캐시 파티셔닝의 성능 비교)

  • Park, JiWoong;Yeom, HeonYoung;Eom, Hyeonsang
    • Journal of KIISE
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    • v.42 no.2
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    • pp.177-182
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    • 2015
  • The era of multi-core processors has begun since the limit of the clock speed has been reached. These days, multi-core technology is used not only in desktops, servers, and table PCs, but also in smartphones. In this architecture, there is always interference between processes, because of the sharing of system resources. To address this problem, cache partitioning is used, which can be roughly divided into two types: software and hardware cache partitioning. When it comes to dynamic cache partitioning, hardware cache partitioning is superior to software cache partitioning, because it needs no page copy. In this paper, we compare the effectiveness of hardware and software cache partitioning on the AMD Opteron 6282 SE, which is the only commodity processor providing hardware cache partitioning, to see whether this technique can be effectively deployed in dynamic environments.

Edge-Centric Metamorphic IoT Device Platform for Efficient On-Demand Hardware Replacement in Large-Scale IoT Applications (대규모 IoT 응용에 효과적인 주문형 하드웨어의 재구성을 위한 엣지 기반 변성적 IoT 디바이스 플랫폼)

  • Moon, Hyeongyun;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.12
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    • pp.1688-1696
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    • 2020
  • The paradigm of Internet-of-things(IoT) systems is changing from a cloud-based system to an edge-based system to solve delays caused by network congestion, server overload and security issues due to data transmission. However, edge-based IoT systems have fatal weaknesses such as lack of performance and flexibility due to various limitations. To improve performance, application-specific hardware can be implemented in the edge device, but performance cannot be improved except for specific applications due to a fixed function. This paper introduces a edge-centric metamorphic IoT(mIoT) platform that can use a variety of hardware through on-demand partial reconfiguration despite the limited hardware resources of the edge device, so we can increase the performance and flexibility of the edge device. According to the experimental results, the edge-centric mIoT platform that executes the reconfiguration algorithm at the edge was able to reduce the number of server accesses by up to 82.2% compared to previous studies in which the reconfiguration algorithm was executed on the server.

Analysis of Closed School Utilization and Activation Factors as Urban-Rural Base Space (도농공존거점공간으로의 폐교 활용방안 및 활성화 요인 분석)

  • Koo, Hee-Dong;Bae, Seung-Jong;Kim, Dae-Sik
    • Journal of Korean Society of Rural Planning
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    • v.28 no.3
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    • pp.95-109
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    • 2022
  • This study attempted to suggest the factors that facilities that aim to exchange urban-rural coexistence base spaces with urban-rural areas should have. In order to derive factors, 15 literatures preceded by similar studies were investigated, and systematic classification was attempted. Finally, the factors for activating urban and rural base facilities were organized into 3 categories, 9 sectors, and 30 activation factors. The three major categories consisted of resources and facilities, content and programs, operational status. As a result of the AHP survey, in the survey area, which is a categories, resources and facilities composed of hardware factors originally possessed by the facility showed the highest score of 48.9. In the sectors, the convenience of facility use was 25.7 points, and the rich state of tangible and intangible resources was 13.3 points in order. In the sectors, income from paid experience programs at facilities was 8.3 points, physical accessibility to facilities was 8.2 points, and the type of areas where the facilities were located was 7.7 points in order. It showed high importance in the order of resources and facilities composed of hardware factors, content and programs composed of software factors, and manpower and operation composed of humanware factors. In general, it was shown that the physical factors of the place when using urban and rural base facilities were judged as the main factors.

A Study on Survey and Analysis of Green-tourism Potential in Rural Tourist Villages (농촌마을 단위 그린투어리즘 포텐셜 조사 분석 연구)

  • Kim, Dae-Sik;Kwon, Yong-Dae
    • Journal of The Korean Society of Agricultural Engineers
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    • v.51 no.3
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    • pp.15-24
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    • 2009
  • This study tried to develop a tentative evaluation system on greentourism potentials(GTP) of rural villages. The GTP evaluation system consisted of 45 detail criteria within three kinds of large scale criteria, which are human resources of residents capability, amenity resources of tourists attraction, and income resources through exchange activity between rural and urban areas. The evaluation criteria were adapted from several decades existing studies considering the hardware(facility and amenity resources) and software(human resources and programs on tourism)resources in rural villages. Two kinds of test study areas, which are subdivisions of county in a typical rural area(Boori) and an suburbanized area surrounding a big city(Chooboo), located on Keumsan county in Chungnam province, were selected to test the GTP evaluation system. The results showed that the average GTP values of each village in Boori are higher than those of Chooboo, due to higher values in criteria on amenity resources and income resources, which the typical rural area may have higher value in such criteria.

Integer Inverse Transform Structure Based on Matrix for VP9 Decoder (VP9 디코더에 대한 행렬 기반의 정수형 역변환 구조)

  • Lee, Tea-Hee;Hwang, Tae-Ho;Kim, Byung-Soo;Kim, Dong-Sun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.4
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    • pp.106-114
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    • 2016
  • In this paper, we propose an efficient integer inverse transform structure for vp9 decoder. The proposed structure is a hardware structure which is easy to control and requires less hardware resources, and shares algorithms for realizing entire DCT(Discrete Cosine Transform), ADST(Asymmetric Discrete Sine Transform) and WHT(Walsh-Hadamard Transform) in vp9. The integer inverse transform for vp9 google model has a fast structure, named butterfly structure. The integer inverse transform for google C model, unlike universal fast structure, takes a constant rounding shift operator on each stage and includes an asymmetrical sine transform structure. Thus, the proposed structure approximates matrix coefficient values for all transform mode and is used to matrix operation method. With the proposed structure, shared operations for all inverse transform algorithm modes can be possible with reduced number of multipliers compared to the butterfly structure, which in turn manages the hardware resources more efficiently.

An Approach to Constructing an Efficient Entropy Source on Multicore Processor (멀티코어 환경에서 효율적인 엔트로피 원의 설계 기법)

  • Kim, SeongGyeom;Lee, SeungJoon;Kang, HyungChul;Hong, Deukjo;Sung, Jaechul;Hong, Seokhie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.1
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    • pp.61-71
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    • 2018
  • In the Internet of Things, in which plenty of devices have connection to each other, cryptographically secure Random Number Generators (RNGs) are essential. Particularly, entropy source, which is the only one non-deterministic part in generating random numbers, has to equip with an unpredictable noise source(or more) for the required security strength. This might cause an requirement of additional hardware extracting noise source. Although additional hardware resources has better performance, it is needed to make the best use of existing resources in order to avoid extra costs, such as area, power consumption. In this paper, we suggest an entropy source which uses a multi-threaded program without any additional hardware. As a result, it reduces the difficulty when implementing on lightweight, low-power devices. Additionally, according to NIST's entropy estimation test suite, the suggested entropy source is tested to be secure enough for source of entropy input.

FPGA-based Implementation of Fast Edge Detection using Sobel Operator (소벨 연산을 이용한 FPGA 기반 고속 윤곽선 검출 회로 구현)

  • Ryu, Sang-Moon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.8
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    • pp.1142-1147
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    • 2022
  • The edges of image should be detected first so that the objects in the image can be identified. An hardware-implemented edge detection algorithm outperforms its software version. Sobel operation is the most suitable algorithm for an hardware implementation of edge detection. And lots of works have been done to perform Sobel operations efficiently on FPGA-based hardware. This work proposes how to implement fast edge detection circuit on FPGA, which is based on the conventional circuit for edge detection using Sobel operator. The newly proposed circuit is suitable for processing images when the images are stored in memory devices and outperforms the conventional one with little additional FPGA resources. Both the conventional circuit and the proposed circuit were implemented on an FPGA. And the result showed that the proposed circuit almost doubles the performance in processing images and needs little additional FPGA resources.

Dynamic Service Composition and Development Using Heterogeneous IoT Systems

  • Ryu, Minwoo;Yun, Jaeseok
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.9
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    • pp.91-97
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    • 2017
  • IoT (Internet of Things) systems are based on heterogeneous hardware systems of different types of devices interconnected each other, ranging from miniaturized and low-power wireless sensor node to cloud servers. These IoT systems composed of heterogeneous hardware utilize data sets collected from a particular set of sensors or control designated actuators when needed using open APIs created through abstraction of devices' resources associated to service applications. However, previously existing IoT services have been usually developed based on vertical platforms, whose sharing and exchange of data is limited within each industry domain, for example, healthcare. Such problem is called 'data silo', and considered one of crucial issues to be solved for the success of establishing IoT ecosystems. Also, IoT services may need to dynamically organize their services according to the change of status of connected devices due to their mobility and dynamic network connectivity. We propose a way of dynamically composing IoT services under the concept of WoT (Web of Things) where heterogeneous devices across different industries are fully integrated into the Web. Our approach allows developers to create IoT services or mash them up in an efficient way using Web objects registered into multiple standardized horizontal IoT platforms where their resources are discoverable and accessible. A Web-based service composition tool is developed to evaluate the practical feasibility of our approach under real-world service development.

The Development of the Automatic Discharge Acquisition & Management System (ADAMS) using Ubiquitous Technique

  • Park, Jae-Young;Oh, Byoung-Dong;Jeon, Seon-Mee;Kim, Jae-Bok
    • Proceedings of the Korea Water Resources Association Conference
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    • 2006.05a
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    • pp.488-493
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    • 2006
  • Accurate river discharge is the most important factor in managing river basins and for successfully maintaining total maximum daily loads in Korea. It is not easy to measure the discharge directly in large rivers owing to physical and environmental constraints, even after investing much time and money. Recently, to overcome these historical drawbacks in river discharge measurement, we have developed the Automatic Discharge Acquisition & Management System (ADAMS) that scans the river cross-section and measures each cell $(1m{\times}1m)$ velocity using HADCP. The hardware system is composed of an HADCP sensor and winch, as well as a PC and software system for the discharge calculation module and hardware control module. It is controlled remotely via the internet and uses the velocity-depth integration method and the velocity-contour method for calculating river discharges. The characteristics of ADAMS are a ubiquitously accessible system, featuring real time automatic discharge measurement, remote control via the internet. The results using ADAMS at the Jindong stage site show less than 5% uncertainty and are 4 times more efficient than the ADCP & Q-boat system. This system can be used to measure any large river, river mouth or tributary river affected by backwater, all of which have a very difficult measuring real time discharge. The next generation of ADAMS will feature an upgrade to increase portability and GPS integration.

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