• Title/Summary/Keyword: Hardware Fault

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The Designs for Prediction of Future Reliability Using the Stochastic Reliabilit

  • Oh, Chung-Hwan;Kim, Bok-Mahn
    • Journal of Korean Society for Quality Management
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    • v.21 no.2
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    • pp.131-139
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    • 1993
  • The newly proposed model of the future reliability results in earlier fault-fixes having a greater effect than the fault which make the greatest contribution to the overall failure rate tend to show themselves earlier, and so are fixed earlier. The suggested model allows a variety of reliability measures to be calculated. Predictions of total execution time(debugging time) is to achieve a target reliability. This model could also apply to computer-hardware reliability growth resulting from the elimination of design error and fault.

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A design of Space Compactor for low overhead in Built-In Self-Test (내장 자체 테스트의 low overhead를 위한 공간 압축기 설계)

  • Jung, Jun-Mo
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.9
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    • pp.2378-2387
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    • 1998
  • This thesis proposes a design algorithm of an efficient space response compactor for Built-In Self-Testing of VLSI circuits. The proposed design algorithm of space compactors can be applied independently from the structure of Circuit Cnder Test. There are high hardware overhead cost in conventional space response compactors and the fault coverage is reduced by aliasing which maps faulty circuit's response to fault-free one. However, the proposed method designs space response compactors with reduced hardware overheads and does not reduce the fault coverage comparing to conventional method. Also, the proposed method can be extended to general N -input logic gate and design the most efficient space response L'Ompactors according to the characteristies of output sequence from CUT. The prolxlsed design algorithm is implemented by C language on a SUN SPARC Workstation, and some experiment results of the simulation applied to ISCAS'85 benchmark circuits with pseudo random patterns generated bv LFSR( Linear Feedback Shift Register) show the efficiency and validity of the proposed design algorithm.

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A New Immunotronic Approach to Hardware Fault Detection Using Symbiotic Evolution (공생 진화를 이용한 Immunotronic 접근 방식의 하드웨어 오류 검출)

  • Lee, Sang-Hyung;Kim, Eun-Tai;Lee, Hee-Jin;Park, Mignon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.5
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    • pp.59-68
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    • 2005
  • A novel immunotronic approach to fault detection in hardware based on symbiotic evolution is proposed in this paper. In the immunotronic system, the generation of tolerance conditions corresponds to the generation of antibodies in the biological immune system. In this paper, the principle of antibody diversity, one of the most important concepts in the biological immune system, is employed and it is realized through symbiotic evolution. Symbiotic evolution imitates the generation of antibodies in the biological immune system morethan the traditional GA does. It is demonstrated that the suggested method outperforms the previous immunotronic methods with less running time. The suggested method is applied to fault detection in a decade counter (typical example of finite state machines) and MCNC finite state machines and its effectiveness is demonstrated by the computer simulation.

JTAG fault injection methodology for reliability verification of defense embedded systems (국방용 임베디드 시스템의 고신뢰성 검증을 위한 JTAG 결함주입 방법론 연구)

  • Lee, Hak-Jae;Park, Jang-Won
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.10
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    • pp.5123-5129
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    • 2013
  • In this paper, it is proposed that JTAG fault injection environment and the results of the classification techniques that the reliability of embedded systems can be tested. As applying these, this is possible to quantitative analysis of vulnerable factor for system. The quantitative analysis for the degree of vulnerability of system is evaluated by faults errors, and failures classification schemes. When applying these schemes, it is possible to verify process and classify for fault that might occur in the system.

Two-Faults Detection and Isolation Using Extended Parity Space Approach

  • Lee, Won-Hee;Kim, Kwang-Hoon;Park, Chan-Gook;Lee, Jang-Gyu
    • Journal of Electrical Engineering and Technology
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    • v.7 no.3
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    • pp.411-419
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    • 2012
  • This paper proposes a new FDI(Fault Detection and Isolation) method, which is called EPSA(Extended Parity Space Approach). This method is particularly suitable for fault detection and isolation of the system with one faulty sensor or two faulty sensors. In the system with two faulty sensors, the fault detection and isolation probability may be decreased when two faults are occurred between the sensors related to the large fault direction angle. Nonetheless, the previously suggested FDI methods to treat the two-faults problem do not consider the effect of the large fault direction angle. In order to solve this problem, this paper analyzes the effect of the large fault direction angle and proposes how to increase the fault detection and isolation probability. For the increase the detection probability, this paper additionally considers the fault type that is not detected because of the cancellation of the fault biases by the large fault direction angle. Also for the increase the isolation probability, this paper suggests the additional isolation procedure in case of two-faults. EPSA helps that the user can know the exact fault situation. The proposed FDI method is verified through Monte Carlo simulation.

Fault Detection Method of Laser Inertial Navigation System Based on the Overlapping Model (중첩모델 기반 레이저 관성항법장치 고장검출 기법)

  • Kim, Cheon-Joong;Yoo, Ki-Jeong;Kim, Hyeon-Suk;Lyou, Joon
    • Journal of Institute of Control, Robotics and Systems
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    • v.17 no.11
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    • pp.1106-1116
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    • 2011
  • LINS (Laser Inertial Navigation System) consists of RLG (Ring Laser Gyroscopes)/accelerometers and provides real-time navigation information to the target system. Therefore it is very important to make a decision in the real time whether LINS is in the normal operation or not. That is called a fault detection method. In this paper, we propose the fault detection method of LINS based on the overlapping model. We also show that the fault detection probability is increased through overlapping the hardware model and the software model. It is verified through the long-term operation and RAM (Reliability Availability Maintainability) analysis of LINS that the fault detection method proposed in this paper is able to detect about 97% of probable system failures.

Fuzzy Model-Based Fault Detection Method of EPB System for Varying Temperature (온도변화에 강인한 EPB 시스템의 퍼지모델 기반 고장검출 방법)

  • Moon, Byoung-Joon;Kim, Dong-Han;Park, Chong-Kug
    • Journal of Institute of Control, Robotics and Systems
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    • v.15 no.10
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    • pp.1009-1013
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    • 2009
  • In this paper, a robust fault detection method for varying temperature based on fuzzy model is proposed. To develop a robust force estimation model, it needs temperature information because the output of force sensor is affected by a temperature variation. The nonlinear dynamic system, such as the parking force of the EPB (Electronic Parking Brake) system is necessary to have a higher order equation model. But, because of the calculation time, the higher order equation model is hard to be used in real application. In case of the lower order equation model, the result is not as accurate as acceptable. To solve this problem, the robust fuzzy model-based fault detection is developed. A proposed fault detection method for varying temperature is verified by HILS (hardware in the loop simulation).

A Study on the Evolvable Hardware Design (EHW) (진화형하드웨어 설계에 관한 연구)

  • Kim, Jong-O;Kim, Duck-Soo;Lee, Won-Seok
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.449-450
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    • 2007
  • Evolvable hardware(EHW) is a dynamic field that brings together reconfigurable hardware, artificial intelligence, fault tolerance and autonomous systems. This paper gives an introduction to the field. The features that can be used to identify and classify evolvable hardware are the evolutionary algorithm, the implementation and the genotype representation. Evolvable hardware (EHW) is hardware that can change its own circuit structure by genetic learning to achieve maximum adaptation to the environment. In conventional EHW, the learning is executed by software on a computer.

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Fault Locator using GPS Time-synchronized Phasor for Transmission Line (송전선로의 동기페이저를 이용한 고장점 표정장치)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.65 no.1
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    • pp.47-52
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    • 2016
  • Fault location identification in the transmission line is an essential part of quick service restoration for maintaining a stable in power system. The application of digital schemes to protection IEDs has led to the development of digital fault locators. Normally, the impedance measurement had been used to for the location detection of transmission line faults. It is well known that the most accurate fault location scheme uses two-ended measurements. This paper deals with the complete design of a fault locator using GPS time-synchronized phasor for transmission line fault detection. The fault location algorithm uses the transmitted relaying signals from the two-ended terminal. The fault locator hardware consists of a Main Processor Unit, Analog Digital Processor Unit, Signal Interface Unit, and Power module. In this paper, sample real-time test cases using COMTRADE format of Omicron apparatus are included. We can see that the implemented fault locator identified all the test faults.

A Study on Software Based Fault-Tolerance Techniques for Flight Control Computer (비행조종컴퓨터 소프트웨어 기반 고장허용 설계 기법 연구)

  • Yoon, Hyung-Sik;Kim, Yeon-Gyun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.44 no.3
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    • pp.256-265
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    • 2016
  • Software based fault tolerance techniques are designed to allow a system to tolerate software faults in the system. Fault tolerance techniques are divided into two groups : software based fault tolerance techniques and hardware based fault tolerance techniques. We need a proper design method according to characteristics of the system. In this paper, the concepts of software based fault tolerance techniques for Dual Flight Control Computer are described. For software based fault tolerance design, we classified software failure, designed a way for failure detection and the way of recovery. Eventually the effectiveness of software based fault tolerance techniques was verified through the Software Test Environment(STE).